STR720 datasheet(210/401 Pages) STMICROELECTRONICS

Part #	STR720

Description	ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES

PDF	401 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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210 / 401 page

STR720 - CONTROLLER AREA NETWORK (CAN)

210/401

18.5.1

CAN Interface Reset State

After the hardware reset, the CAN Peripheral registers hold the reset values given in the

Additionally the busoff state is reset and the output CAN_TX is set to recessive (HIGH). The

value 0x0001 (Init = ‘1’) in the CAN Control Register enables the software initialization. The

CAN Peripheral does not influence the CAN bus until the CPU resets the Init bit to ‘0’.

The data stored in the Message RAM is not affected by a hardware reset. After powering on,

the contents of the Message RAM are undefined.

18.5.2

CAN Protocol Related Registers

These registers are related to the CAN protocol controller in the CAN Core. They control the

operating modes and the configuration of the CAN bit timing and provide status information.

Interrupt Pending Registers 1 & 2 (CAN_IPnR)

140h (CAN_IP1R), 144h

(CAN_IP2R)

0000 0000h

Message Valid Registers 1 & 2 (CAN_MVnR)

160h (CAN_MV1R), 164h

(CAN_MV2R)

0000 0000h

Table 48. CAN Registers

Address Offset

Reset Value

STR720 Datasheet(PDF) 210 Page - STMicroelectronics