ST92195D datasheet(212/249 Pages) STMICROELECTRONICS

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ST92195C/D - ELECTRICAL CHARACTERISTICS

AC ELECTRICAL CHARACTERISTICS

PIN CAPACITANCE

(VDD= 5V +/-10%; TA= 0 to 70°C; unless otherwise specified)

CURRENT CONSUMPTION

(VDD= 5V +/-10%; TA= 0 to 70°C; unless otherwise specified)

Notes:

1. Port 0 is configured in push-pull output mode (output is high). Ports 2, 3, 4 and 5 are configured in bi-directional weak pull-up mode resistor.

The external CLOCK pin (OSCIN) is driven by a square wave external clock at 8 MHz. The internal clock prescaler is in divide-by-1 mode.

2. The CPU is fed by a 24 MHz frequency issued by the Main Clock Controller. VSYNC is tied to

VSS, HSYNC is driven by a 15625 Hz clock.

All peripherals working including Display.

3. The CPU is fed by a 24 MHz frequency issued by the Main Clock Controller. VSYNC is tied to

VSS, HSYNC is driven by a 15625 Hz clock.

The TDSRAM interface and the Slicers are working; the Display controller is not working.

4. VSYNC and HSYNC tied to

VSS. External CLOCK pin (OSCIN) is hold low. All peripherals are disabled.

EXTERNAL INTERRUPT TIMING TABLE

(VDD = 5 V ± 10%, TA = 0°C +70° C, CLOAD = 50 pF, INTCLK = 12 MHz, Push-pull output configuration,

unless otherwise specified)

Note: The value left hand two columns show the formula used to calculate the timing minimum or maximum from the oscillator clock period,

prescale value and number of wait cycles inserted.

The value right hand two columns show the timing minimum for an external clock at 24 MHz divided by 2, prescale value of zero and zero

wait status.

TpC = OSCIN clock period

Symbol

Parameter

Conditions

Value

Unit

min

max

CIO

Pin Capacitance Digital Input/Output

Symbol

Parameter

Conditions

Value

Unit

min

typ.

max

IDD1

Run Mode Current

Notes 1,2; all ON

100

IDDA1

Run Mode Analog Current

(pin VDDA)

Timing Controller ON

IDD2

HALT Mode Digital Current

Notes 1,4

100

µA

IDDA2

HALT Mode Analog Current

(pin VDDA)

Notes 1,4

100

µA

N°

Symbol

Parameter

Value (Note)

Unit

OSCIN Divided

by 2 Min.

OSCIN Not Divided

by 2 Min.

Min.

TwLR

Low Level Minimum Pulse Width in Rising

Edge Mode

2TpC+12

TpC+12

TwHR

High Level Minimum Pulse Width in Rising

Edge Mode

2TpC+12

TpC+12

TwHF

High Level Minimum Pulse Width in Falling

Edge Mode

2TpC+12

TpC+12

TwLF

Low Level Minimum Pulse Width in Falling

Edge Mode

2TpC+12

TpC+12

ST92195D Datasheet(PDF) 212 Page - STMicroelectronics

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