| Electronic Components Datasheet Search |
|
TMS320VC5506ZAYR Datasheet(PDF) 40 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TMS320VC5506ZAYR Datasheet(HTML) 40 Page - Texas Instruments |
|
40 / 119 page ![]() Functional Overview 40 October 2006 − Revised January 2008 SPRS375C 3.5.3 Parallel Port Signal Routing The 5506 allows access to 16-bit-wide (read and write) or 8-bit-wide (read only) asynchronous memory and 16-bit-wide SDRAM. For 16-bit-wide memories, EMIF.A[0] is kept low and is not used. To provide as many address pins as possible, the 5506 routes the parallel port signals as shown in Figure 3−6. Figure 3−6 shows the addition of the A ′[0] signal in the BGA package. This pin is used for asynchronous memory interface only, while the A[0] pin can also be used with the GPIO. Figure 3−7 summarizes the use of the parallel port signals for memory interfacing. EMIF.A[0] GPIO.A[0] EMIF.A[13:1] GPIO.A[13:1] EMIF.A[14] GPIO.A[14] EMIF.A[15] GPIO.A[15] EMIF.A[20:16] A’[0] (BGA only) A[0] A[13:1] A[14] (BGA only) A[15] (BGA only) A[20:16] (BGA only) Figure 3−6. Parallel Port Signal Routing |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |