2ED2181S06F datasheet(13/24 Pages) INFINEON

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2020-07-07

2ED2181 (4) S06F (J)

650 V high-side and low-side driver with integrated bootstrap diode

= ∆

∆VBS is the maximum allowable voltage drop at the bootstrap capacitor within a switching period, typically 1 V.

It is recommended to keep the voltage drop below the undervoltage lockout (UVLO) of the high side and limit

∆VBS≤ (VCC– VF– VGSmin– VDSon)

VGSmin > VBSUV- , VGSmin is the minimum gate source voltage we want to maintain and VBSUV- is the high-side supply

undervoltage negative threshold.

VCC is the IC voltage supply, VF is bootstrapdiode forward voltage and VDSon is drain-source voltage of low side

MOSFET.

Please note, that the value QGTOT may vary to a maximum value based on different factors as explained below and

the capacitor shows voltage dependent derating behavior of its capacitance.

The influencing factors contributing VBS to decrease are:

- MOSFET turn on required Gate charge (QG)

- MOSFET gate-source leakage current (ILK_GS)

- Floating section quiescent current (IQBS)

- Floating section leakage current (ILK)

- Bootstrap diode leakage current (ILK_DIODE)

- Charge required by the internal level shifters (

): typical 1nC

- Bootstrap capacitor leakage current (ILK_CAP)

- High side on time (THON)

Considering the above,

= + + + + + + ∗

ILK_CAP is only relevant when using an electrolytic capacitor and can be ignored if other types of capacitors are

used. It is strongly recommend using at least one low ESR ceramic capacitor (paralleling electrolytic capacitor

and low ESR ceramic capacitor may result in an efficient solution).

The above CBS equation is valid for pulse by pulse considerations. It is easy to see, that higher capacitance values

are needed, when operating continuously at small duty cycles of low side. The recommended bootstrap

capacitance is therefore in the range up to 4.7 μF for most switching frequencies. The performance of the

integrated bootstrap diode supports the requirement for small bootstrap capacitances.

5.8

Tolerant to negative tranisents on input pins

Typically the driver's ground pin is connected close to the source pin of the MOSFET or IGBT. The microcontroller

which sends the HIN and LIN PWM signals refers to the same ground and in most cases there will be an offset

voltage between the microcontroller ground pin and driver ground because of ground bounce. The 2ED218x

family can handle negative voltage spikes up to 5 V. The recommended operating level is at negative 4 V with

absolute maximum of negative 5 V. Standard half bridge or high-side/low-side drivers only allow negative voltage

levels down to -0.3 V. The 2ED218x family has much better noise immunity capability on the input pins.

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