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STSPIN820 Datasheet(PDF) 14 Page - STMicroelectronics |
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STSPIN820 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 29 page ![]() Functional description STSPIN820 14/29 DocID031065 Rev 2 When the full-step mode is set, the reference value of the PWM current controllers and the direction of the currents are set as listed in Table 8. When the step mode is different from the full-step mode the values listed in Table 9 are used. The DECAY input determinates the behavior of the PWM current control as described in Section 5.3. When the EN\FAULT input is forced low the power stage is immediately disabled (all MOSFETs are turned off). The pin is also used as FAULT indication through the integrated open-drain MOSFET as described in Section 5.4 on page 19 and Section 5.5 on page 22. Table 10 shows the target reference and sequencer values for the 1/2-, 1/4- and 1/8-step operation. Higher microstepping resolutions follow the same pattern. The reset state (home state) for all stepping mode is entered at power-up or when the device exits the standby status. Table 8. Target reference and current direction according to sequencer value (full-step mode) Sequencer value Phase A Phase B Reference voltage Current direction Reference voltage Current direction 0 0 X X X X XXX X 100% × VREF A1 → A2 100% × VREF B1 → B2 0 1 X X X X XXX X 100% × VREF A1 → A2 100% × VREF B1 ← B2 1 0 X X X X XXX X 100% × VREF A1 ← A2 100% × VREF B1 ← B2 1 1 X X X X XXX X 100% × VREF A1 ← A2 100% × VREF B1 → B2 Table 9. Target reference and current direction according to sequencer value (not full-step mode) Sequencer value Phase A Phase B Reference voltage Current direction Reference voltage Reference voltage 0 0 0 0 0 0 0 0 0 0 Zero (power bridge disabled) - 100% × VREF B1 → B2 00 N Sin (N/256 × π/2) × VREF A1 → A2 - B1 → B2 0 1 0 0 0 0 0 0 0 0 100% × VREF A1 → A2 Zero (power bridge disabled) - 01 N Sin (π/2 + N/256 × π/2) × VREF A1 → A2 Cos (π/2 + N/256 × π/2) × VREF B1 ← B2 1 0 0 0 0 0 0 0 0 0 Zero (power bridge disabled) - 100% × VREF B1 ← B2 10 N Sin (N/256 × π/2) × VREF A1 ← A2 Cos (N/256 × π/2) × VREF B1 ← B2 1 1 0 0 0 0 0 0 0 0 100% × VREF A1 ← A2 Zero (power bridge disabled) - 11 N Sin (π/2 + N/256 × π/2) × VREF A1 ← A2 Cos (π/2 + N/256 × π/2) × VREF B1 → B2 |
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