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STEF12H60M Datasheet(PDF) 18 Page - STMicroelectronics |
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STEF12H60M Datasheet(HTML) 18 Page - STMicroelectronics |
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18 / 34 page ![]() 6.11 Parallel operation Figure 5 shows a typical circuit configuration used to protect high power systems. In this case multiple STEF12H60M are used in a parallel configuration to increase the total current capability. In such design the following guidelines must be followed: • The ON_PD pins of all eFuses must be tied together to achieve a simultaneous startup. • All the SS pins must be connected together to a single CSS capacitor. The value of this capacitor should be calculated by using Eq. (1), taking into account that each device provides its ISS charging current to the capacitor. The SS pin is also used to discharge the CSS capacitor during shutdown. In case one eFuse shuts down, the common CSS capacitor is discharged causing simultaneous shutdown of all the paralleled devices. • All the CLREF pins must be tied together to a single RCL resistor or to common VCLREF control signal from the system controller to set the current limit reference. When using the RCL resistor, the ICL bias current coming from each device must be accounted. • Each CS pin must be connected to a local RS, to ensure the current sensing circuit is able to read the single eFuse current. • The IMON pins can be all tied together to a single RMON / CMON filter. In this way the IMON currents coming from each eFuse all contribute to the voltage generated on the resistor, that results proportional to the total system current. If it is necessary to read the single eFuse current, the local RMON resistor approach can be used. • The VTEMP pins can be all tied together in Or-ing configuration, therefore the system controller reads the highest temperature among all the eFuses. • When needed, all of the D_OC and all of the GOK fault flag pins can be tied together and pulled up via a single resistor. • To accomplish simultaneous reset, each device must have its dedicated reset switch, for instance a MOSFET, connected to VDD pin. All the gates of the reset MOSFETS must be tied together to the common reset signal. • If the auto-retry version (STEF12H60MAPUR) is used in parallel configuration, dedicated circuital provision should be made. Specifically, it is recommended to connect all the ON/PD pins to the GOK ones as shown in Figure 7 to ensure a proper synchronization of the auto-retry cycle. A common Enable signal can be used to start up the devices. • During power-up in parallel operation, keeping the load current through each eFuse lower than 1.5 A (typical) helps to prevent overstress in the internal power MOSFETS at each soft-start cycle. STEF12H60M Parallel operation DS13608 - Rev 3 page 18/34 |
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