ACE24AC16C

Two-wire Serial EEPROM

VER 1.1

3

Block Diagram

Pin Description

A.

SERIAL CLOCK (SCL)

The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of

this clock is to clock data out of the EEPROM device.

B.

SERIAL DATALINE (SDA)

SDA data line is a bi-directional signal for the serial devices.

It is an open drain output signal and

can be wired- OR with other open-drain output devices.

C.

WRITE PROTECT (WP)

The ACE24AC16C devices have a WP pin to protect the whole EEPROM array from programming.

Programming operations are allowed if WP pin is left un-connected or input to VIL. Conversely all

programming functions are disabled if WP pin is connected to VIH or VCC. Read operations is not

affected by the WP pin

’s input level. If left unconnected, it is internally recognized as VIL. However,

due to capacitive coupling that may appear in customer applications, ACE recommends always

connecting the WP pin to a known state. When using a pull-up or pull-down resistor, ACE

recommends using 10k

Ω or less.