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AS4LC256K16EO Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation |
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AS4LC256K16EO Datasheet(HTML) 1 Page - Alliance Semiconductor Corporation |
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1 / 25 page  Copyright © Alliance Semiconductor. All rights reserved. AS4LC256K16EO 4/11/01; V.1.1 Alliance Semiconductor P. 1 of 25 3.3V 256K X 16 CMOS DRAM (EDO) ® Features • Organization: 262,144 words × 16 bits •High speed - 45/60 ns RAS access time - 10/12/15/20 ns column address access time - 7/10/10 ns CAS access time • Low power consumption - Active: 280 mW max (AS4LC256K16EO-35) - Standby: 2.8 mW max, CMOS I/O (AS4LC256K16EO- 35) •EDO page mode •5V I/O tolerant • 512 refresh cycles, 8 ms refresh interval -RAS-only or CAS-before-RAS refresh or self refresh • Read-modify-write • LVTTL-compatible, three-state I/O • JEDEC standard packages - 400 mil, 40-pin SOJ - 400 mil, 40/44-pin TSOP II • 3.3V power supply • Latch-up current > 200 mA Pin arrangement 40 39 38 37 36 35 34 33 32 31 GND I/O15 I/O14 I/O13 I/O12 GND I/O11 I/O10 I/O9 I/O8 SOJ 30 29 28 27 26 25 24 23 22 21 NC LCAS UCAS OE A8 A7 A6 A5 A4 GND 1 2 3 4 5 6 7 8 9 10 Vcc I/O0 I/O1 I/O2 I/O3 Vcc I/O4 I/O5 I/O6 I/O7 11 12 13 14 15 16 17 18 19 20 NC NC WE RAS NC A0 A1 A2 A3 Vcc VCC I/O0 I/O1 I/O2 I/O3 VCC I/O4 I/O5 I/O6 I/O7 NC NC WE RAS NC A0 A1 A2 A3 VCC GND I/O15 I/O14 I/O13 I/O12 GND I/O11 I/O10 I/O9 I/O8 NC LCAS UCAS OE A8 A7 A6 A5 A4 GND 44 43 42 41 40 39 38 37 36 35 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 13 14 15 16 17 18 19 20 21 22 TSOP II Pin designation Pin(s) Description A0 to A8 Address inputs RAS Row address strobe I/O0 to I/O15 Input/output OE Output enable UCAS Column address strobe, upper byte LCAS Column address strobe, lower byte WE Read/write control VCC Power (3.3V ± 0.3V) GND Ground Selection guide Symbol AS4LC256K16EO-35 AS4LC256K16EO-45 AS4LC256K16EO-60 Unit Maximum RAS access time tRAC 35 45 60 ns Maximum column address access time tCAA 17 20 25 ns Maximum CAS access time tCAC 710 10 ns Maximum output enable (OE) access time tOEA 710 10 ns Minimum read or write cycle time tRC 50 80 100 ns Minimum EDO page mode cycle time tPC 15 17 30 ns Maximum operating current ICC1 70 60 50 mA Maximum CMOS standby current ICC2 200 200 200 µA |
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