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ATWILC3000A Datasheet(PDF) 13 Page - Microchip Technology |
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ATWILC3000A Datasheet(HTML) 13 Page - Microchip Technology |
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13 / 56 page ![]() 4. CPU and Memory Subsystem 4.1 Processor The ATWILC3000A has two Cortus APS3 32-bit processors, one is used for Wi-Fi ® and the other is used for Bluetooth. In IEEE 802.11 mode, the processor performs many of the MAC functions, including but not limited to: association, authentication, power management, security key management and MSDU aggregation/deaggregation. In addition, the processor provides flexibility for various modes of operation, such as Station (STA) and Access Point (AP) modes. In Bluetooth mode, the processor handles multiple tasks of the Bluetooth protocol stack. 4.2 Memory Subsystem The APS3 core uses a 256 KB instruction/boot ROM (160 KB for IEEE 802.11 and 96 KB for Bluetooth), along with a 420 KB instruction RAM (128 KB for IEEE 802.11 and 292 KB for Bluetooth) and a 128 KB data RAM (64 KB for IEEE 802.11 and 64 KB for Bluetooth). In addition, the device uses a 160 KB shared/exchange RAM (128 KB for IEEE 802.11 and 32 KB for Bluetooth), accessible by the processor and MAC, which allows the processor to perform various data management tasks on the Tx and Rx data packets. 4.3 Nonvolatile Memory (eFuse) The ATWILC3000A devices have 768 bits of nonvolatile eFuse memory that can be read by the CPU after device Reset. The eFuse is partitioned into six 128-bit banks (Bank 0 – Bank 5). Each bank has the same bit map (see the following figure). The purpose of the first 108 bits in each bank is fixed and the remaining 20 bits are general purpose software-dependent bits or reserved for future use. Currently, the Bluetooth address is derived from the Wi-Fi MAC address, such that Bluetooth address = Wi-Fi MAC address + 1. This nonvolatile one-time-programmable (OTP) memory can be used for storing the following customer-specific parameters: • MAC address. • Calibration information. For example, crystal frequency offset. • Other software-specific configuration parameters. Each bank can be programmed independently, which allows for several updates of the device parameters following the initial programming. For example, if the MAC address is currently programmed in Bank 1 and the MAC address has to be changed, the following steps should be performed: 1. Invalidate the contents of Bank 1 by programming the Bank Invalid bit field of Bank 1. 2. Program Bank 2 with the new MAC address along with the values of ADC Calib (from Bank 1), Frequency Offset (from Bank 1), IQ Amp Correction (from Bank 1) and IQ Pha Correction (from Bank 1). The Used bit field for each corresponding value bit field should also be programmed. 3. Validate the contents of Bank 2 by programming the Bank Used bit field of Bank 2. Each bit field (that is, MAC Addr, ADC Calib, Freq Offset, IQ Amp Correction and IQ Pha Correction) has its corresponding Used bit field. Each Used bit field is used to indicate to the firmware that the value in the related bit field is valid. A value of ‘0’ in the Used bit field indicates that the following bit field is invalid, and a value of ‘1’ programmed to the Used bit field indicates that the corresponding bit field is valid and can be used by the firmware. By default, all the ATWILC3000A devices are programmed with the ADC Calib, IQ Amp and IQ Phase fields of Bank 0. In IC variants where the MAC address is assigned, the MAC address bit field will be programmed in Bank 0. For more information on IC marking, refer to 1. Ordering Information and IC Marking. ATWILC3000A CPU and Memory Subsystem © 2015-2021 Microchip Technology Inc. Datasheet DS70005427B-page 13 |
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