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Z8F082ASH020SC Datasheet(PDF) 171 Page - Zilog, Inc. |
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Z8F082ASH020SC Datasheet(HTML) 171 Page - Zilog, Inc. |
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171 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y On-Chip Debugger Z8 Encore! XP® F08xA Series Product Specification 153 Runtime Counter The On-Chip Debugger contains a 16-bit Runtime Counter. It counts system clock cycles between Breakpoints. The counter starts counting when the On-Chip Debugger leaves DEBUG mode and stops counting when it enters DEBUG mode again or when it reaches the maximum count of FFFFH. On-Chip Debugger Commands The host communicates to the On-Chip Debugger by sending OCD commands using the DBG interface. During normal operation, only a subset of the OCD commands are avail- able. In DEBUG mode, all OCD commands become available unless the user code and control registers are protected by programming the Flash Read Protect Option bit (FRP). The Flash Read Protect Option bit prevents the code in memory from being read out of the Z8 Encore! XP® F08xA Series products. When this option is enabled, several of the OCD commands are disabled. Table 99 on page 158 is a summary of the On-Chip Debugger commands. Each OCD command is described in further detail in the bulleted list follow- ing this table. Table 99 also indicates those commands that operate when the device is not in DEBUG mode (normal operation) and those commands that are disabled by program- ming the Flash Read Protect Option bit. Debug Command Command Byte Enabled when NOT in DEBUG mode? Disabled by Flash Read Protect Option Bit Read OCD Revision 00H Yes – Reserved 01H – – Read OCD Status Register 02H Yes – Read Runtime Counter 03H – – Write OCD Control Register 04H Yes Cannot clear DBGMODE bit Read OCD Control Register 05H Yes – Write Program Counter 06H – Disabled Read Program Counter 07H – Disabled Write Register 08H – Only writes of the Flash Memory Control registers are allowed. Additionally, only the Mass Erase command is allowed to be written to the Flash Control register. Read Register 09H – Disabled Write Program Memory 0AH – Disabled Read Program Memory 0BH – Disabled |
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