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Z8F082ASH020SC Datasheet(PDF) 177 Page - Zilog, Inc. |
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Z8F082ASH020SC Datasheet(HTML) 177 Page - Zilog, Inc. |
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177 / 244 page  PS024705-0405 P R E L I M I N A R Y On-Chip Debugger Z8 Encore! XP® F08xA Series Product Specification 159 through a normal Power-On Reset sequence with the exception that the On-Chip Debug- ger is not reset. This bit is automatically cleared to 0 at the end of reset. 0 = No effect. 1 = Reset the Flash Read Protect Option Bit device. OCD Status Register The OCD Status register reports status information about the current state of the debugger and the system. DBG—Debug Status 0 = NORMAL mode 1 = DEBUG mode HALT—HALT Mode 0 = Not in HALT mode 1 = In HALT mode FRPENB—Flash Read Protect Option Bit Enable 0 = FRP bit enabled, that allows disabling of many OCD commands 1 = FRP bit has no effect Reserved—Must be 0. Table 100. OCD Status Register (OCDSTAT) BITS 7 6 5 4 3 2 1 0 FIELD DBG HALT FRPENB Reserved RESET 000 000 00 R/W RR RRR RRR |
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