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Z8F082ASH020SC Datasheet(PDF) 183 Page - Zilog, Inc. |
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Z8F082ASH020SC Datasheet(HTML) 183 Page - Zilog, Inc. |
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183 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y Crystal Oscillator Z8 Encore! XP® F08xA Series Product Specification 165 Crystal Oscillator Overview The products in the Z8 Encore! XP® F08xA Series contain an on-chip crystal oscillator for use with external crystals with 32KHz to 20MHz frequencies. In addition, the oscillator supports external RC networks with oscillation frequencies up to 4MHz or ceramic reso- nators with frequencies up to 8MHz. The on-chip crystal oscillator can be used to generate the primary system clock for the internal eZ8 CPU and the majority of the on-chip periph- erals. Alternatively, the XIN input pin can also accept a CMOS-level clock input signal (32KHz–20MHz). If an external clock generator is used, the XOUT pin must be left uncon- nected. The Z8 Encore! XP® F08xA Series products do not contain an internal clock divider. The frequency of the signal on the XIN input pin determines the frequency of the system clock. Although the XIN pin can be used as an input for an external clock generator, the CLKIN pin is better suited for such use (See “System Clock Selection” on page 160.) Operating Modes The Z8 Encore! XP® F08xA Series products support four oscillator modes: • Minimum power for use with very low frequency crystals (32KHz–1MHz) • Medium power for use with medium frequency crystals or ceramic resonators (0.5MHz to 8MHz) • Maximum power for use with high frequency crystals (8MHz to 20MHz) • On-chip oscillator configured for use with external RC networks (<4MHz) The oscillator mode is selected using user-programmable Flash Option Bits. Please refer to the chapter “Flash Option Bits” on page 138 for information. Crystal Oscillator Operation The Flash Option bit XTLDIS controls whether the crystal oscillator is enabled during reset. The crystal may later be disabled after reset if a new oscillator has been selected as the system clock. If the crystal is manually enabled after reset through the OSCCTL regis- ter, the user code must wait at least 1000 crystal oscillator cycles for the crystal to stabi- lize. After this, the crystal oscillator may be selected as the system clock. Figure 25 illustrates a recommended configuration for connection with an external funda- mental-mode, parallel-resonant crystal operating at 20MHz. Recommended 20MHz crys- Note: |
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