PD70224 datasheet(8/30 Pages) MICROCHIP

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The following figure shows a detailed view of the resistors to be selected in an external adapter connection.

Figure 1-5. External Power Input Resistors Dividers

VPNo

VPNin

(-) Input

(+)

Input

PD IC EN

100n

R1 and R2 sets a threshold for Pfet Q1 enable to detect an external adapter. It must be set to a lower threshold than

PD70210A disable levels. R3 and R4 sets the PD70210A disable threshold. Therefore, in 36 V–57 V external

adapter, the disable settings are selected as follows:

• Pfet enable threshold = 30 V.

• R1 and R2 setting must be the value of Q1 VGS < 20 V at the maximum voltage condition of the external

adapter.

• When the external adapter voltage is more than 30 V, Q1 is more than its VGSTH value.

• R1 is selected as 2 KΩ.

• Using R1 = 2 KΩ, Vext_adapter = 30 V, and VGS = maximum VGSTH = 3.5 V, provides the R2 value as 15 KΩ.

• R3 and R4 are set to the range of few KΩ to tens of KΩ using the following equation.

• Using R3 = 15 KΩ, Vext_adapter = 33.7 V, and PD70210A_WA_EN = 2.4 V as turn-off minimum threshold from

the datasheet, solving the equation gives the valid resistor values for an adapter of 36 V and above.

The values are: R3 = 15 KΩ and R4 = 1.15 KΩ.

For more information and various adapter connection methods, see AN3472 Implementing AUX Power in PoE

Application Note.

PD70210/PD70210A/PD70210AL

Functional Descriptions

Datasheet

DS00003695A-page 8

PD70224 Datasheet(PDF) 8 Page - Microchip Technology