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STM32H750VB Datasheet(PDF) 166 Page - STMicroelectronics |
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STM32H750VB Datasheet(HTML) 166 Page - STMicroelectronics |
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166 / 335 page ![]() Electrical characteristics (rev Y) STM32H750VB STM32H750ZB STM32H750IB STM32H750XB 166/334 DS12556 Rev 5 IDDA(DAC) DAC quiescent consumption from VDDA DAC output buffer ON No load, middle code (0x800) - 360 - µA No load, worst code (0xF1C) - 490 - DAC output buffer OFF No load, middle/worst code (0x800) -20 - Sample and Hold mode, CSH=100 nF - 360*TON/ (TON+TOFF) - IDDV(DAC) DAC consumption from VREF+ DAC output buffer ON No load, middle code (0x800) - 170 - No load, worst code (0xF1C) - 170 - DAC output buffer OFF No load, middle/worst code (0x800) - 160 - Sample and Hold mode, Buffer ON, CSH=100 nF (worst code) - 170*TON/ (TON+TOFF) - Sample and Hold mode, Buffer OFF, CSH=100 nF (worst code) - 160*TON/ (TON+TOFF) - 1. Guaranteed by characterization results. 2. Guaranteed by design. 3. In buffered mode, the output can overshoot above the final value for low input code (starting from the minimum value). Table 87. DAC characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit Table 88. DAC accuracy(1) Symbol Parameter Conditions Min Typ Max Unit DNL Differential non linearity(2) DAC output buffer ON - ±2 - LSB DAC output buffer OFF - ±2 - INL Integral non linearity(3) DAC output buffer ON, CL≤50 pF, RL ≥ 5 ? -±4 - LSB DAC output buffer OFF, CL ≤ 50 pF, no RL -±4 - Offset Offset error at code 0x800 (3) DAC output buffer ON, CL ≤ 50 pF, RL ≥ 5 ? VREF+ = 3.6 V - - ±12 LSB VREF+ = 1.8 V - - ±25 DAC output buffer OFF, CL ≤ 50 pF, no RL -- ±8 |
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