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STM8S903K3 Datasheet(PDF) 24 Page - STMicroelectronics |
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STM8S903K3 Datasheet(HTML) 24 Page - STMicroelectronics |
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24 / 124 page ![]() Pinouts and pin descriptions STM8S903K3 STM8S903F3 24/124 DocID15590 Rev 12 19 16 PD2/AIN3/ [TIM5_CH3] I/O X X X HS O3 X X Port D2 - Analog input 3 [AFR2] Timer 52 - channel 3 [AFR1] 20 17 PD3/ AIN4/ TIM5_CH2/ ADC_ETR I/O X X X HS O3 X X Port D3 Analog input 4 Timer 52 - channel 2/ADC external trigger - 1 18 PD4/ TIM5_CH1/ BEEP [UART1_CK] I/O X X X HS O3 X X Port D4 Timer 5 - channel 1/BEEP output UART clock [AFR2] 2 19 PD5/ AIN5/ UART1_TX I/O X X X HS O3 X X Port D5 Analog input 5/ UART1 data transmit - 3 20 PD6/ AIN6/ UART1_RX I/O X X X HS O3 X X Port D6 Analog input 6/ UART1 data receive - 1. I/O pins used simultaneously for high current source/sink must be uniformly spaced around the package. In addition, the total driven current must respect the absolute maximum ratings (see Section 10.2: Absolute maximum ratings). 2. When the MCU is in Halt/Active-halt mode, PA1 is automatically configured in input weak pull-up and cannot be used for waking up the device. In this mode, the output state of PA1 is not driven. It is recommended to use PA1 only in input mode if Halt/Active-halt is used in the application. 3. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up, and protection diode to VDD are not implemented) 4. The PD1 pin is in input pull-up during the reset phase and after internal reset release. Table 5. TSSOP20/SO20/UFQFPN20 pin descriptions (continued) Input Output |
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