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SPC572L64F2 Datasheet(PDF) 61 Page - STMicroelectronics |
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SPC572L64F2 Datasheet(HTML) 61 Page - STMicroelectronics |
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61 / 112 page ![]() DocID027866 Rev 5 61/112 SPC572Lx Electrical characteristics 111 12. The LXRXOP[0] bit in the LFAST LVDS Control Register (LCR) must be set to one to ensure proper LFAST receive timing. 13. Total internal capacitance including receiver and termination, co-bonded GPIO pads, and package contributions. Table 29. LFAST transmitter electrical characteristics(1)(2) Symbol C Parameter Conditions Value Unit Min Typ Max fDATA SR D Data rate — — — 320 Mbps VOS CC P Common mode voltage — 1.08 — 1.32 V |VOD| CC P Differential output voltage swing (terminated)(3)(4) — 110 171 285 mV tTR CC T Rise/Fall time (absolute value of the differential output voltage swing)(3),(4) —0.26 — 1.5 ns CL SR D External lumped differential load capacitance(3) VDD_HV_IO = 4.5 V — — 9.0 pF VDD_HV_IO = 3.0 V — — 8.5 ILVDS_TX CC T Transmitter DC current consumption Enabled — — 3.2 mA 1. The LFAST pad electrical characteristics are based on worst case internal capacitance values shown in Figure 17. 2. All LFAST LVDS pad electrical characteristics are valid from –40 °C to 150 °C. 3. Valid for maximum data rate fDATA. Value given is the capacitance on each terminal of the differential pair, as shown in Figure 17. 4. Valid for maximum external load CL. Table 30. MSC/DSPI LVDS transmitter electrical characteristics (1)(2) Symbol C Parameter Conditions Value Unit Min Typ Max Data Rate fDATA SR D Data rate — — — 80 Mbps VOS CC P Common mode voltage — 1.08 — 1.32 V |VOD| CC P Differential output voltage swing (terminated)(3)(4) — 150 214 400 mV tTR CC T Rise/Fall time (absolute value of the differential output voltage swing)(3),(4) —0.8 — 4.0 ns CL SR D External lumped differential load capacitance(3) VDD_HV_IO = 4.5 V — — 41 pF VDD_HV_IO = 3.0 V — — 39 ILVDS_TX CC T Transmitter DC current consumption Enabled — — 4.0 mA 1. The MSC and DSPI LVDS pad electrical characteristics are based on the application circuit and typical worst case internal capacitance values given in Figure 17. 2. All MSC and DSPI LVDS pad electrical characteristics are valid from –40 °C to 150 °C. 3. Valid for maximum data rate fDATA. Value given is the capacitance on each terminal of the differential pair, as shown in Figure 17. 4. Valid for maximum external load CL. |
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