CYT4BFCCJS datasheet(3/217 Pages) INFINEON

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Datasheet

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002-21617 Rev. *J

2022-02-18

TRAVEO™ T2G 32-bit Automotive MCU

Based on Arm® Cortex®-M7 dual

Features

• External memory interface

- One SPI (single, dual, quad, or octal) or HYPERBUS™ interface

- On-the-fly encryption and decryption

- Execute-In-Place (XIP) from external memory

• SDHC interface

- One Secure Digital High Capacity (SDHC) interface supporting embedded MultiMediaCard (eMMC), Secure

Digital (SD), or SDIO (Secure Digital Input Output)

• Compliant to eMMC 5.1, SD 6.0, and SDIO 4.10 specifications

- Data rates up to SD High Speed 50 MHz, or eMMC 52 MHz DDR

• Audio interface

- Three Inter-IC Sound (I2S) Interfaces for connecting digital audio devices

-I2S, left justified, or time division multiplexed (TDM) audio formats

- Independent transmit or receive operation, each in master or slave mode

• Timers

- Up to 102 16-bit and 16 32-bit timer/counter pulse-width modulator (TCPWM) blocks

• Up to 15 16-bit counters for motor control

• Up to 87 16-bit counters and 16 32-bit counters for regular operations

• Supports timer, capture, quadrature decoding, pulse-width modulation (PWM), PWM with dead time

(PWM_DT), pseudo-random PWM (PWM_PR), and shift-register (SR) modes

- Up to 16 Event Generation (EVTGEN) timers supporting cyclic wakeup from DeepSleep

• Events trigger a specific device operation (such as execution of an interrupt handler, a SAR ADC conversion,

and so on)

• Real time clock (RTC)

- Year/Month/Date, Day-of-week, Hour:Minute:Second fields

- 12- and 24-hour formats

-Automatic leap-year correction

• I/O

- Up to 240 programmable I/Os

- Three I/O types

• GPIO Standard (GPIO_STD)

• GPIO Enhanced (GPIO_ENH)

• High-Speed I/O Standard (HSIO_STD)

• Regulators

- Generates a 1.1-V nominal core supply from a 2.7-V to 5.5-V input supply

- Three regulators:

• DeepSleep

•Core internal

•Core external

• Programmable analog

- Three SAR A/D converters with up to 99 external channels (96 I/Os + 3 I/Os for motor control)

• Each ADC supports 32 logical channels, with 32 + 1 physical connections. Any external channel can be

connected to any logical channel in the respective SAR.

- Each ADC supports 12-bit resolution and sampling rates of up to 1 Msps

- Each ADC also supports six internal analog inputs like

• Bandgap reference to establish absolute voltage levels

• Calibrated diode for junction temperature calculations

• Two AMUXBUS inputs and two direct connections to monitor supply levels

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