PPC5605BAMLL4R datasheet(113/114 Pages) NXP

113 / 114 page

Revision history

MPC5607B Microcontroller Data Sheet, Rev. 10

NXP Semiconductors

113

13 May 2013 In the cover feature list:

added “and ECC” at the end of

“Up to 1.5 MB on-chip code flash memory supported with the flash memory controller”

added “with ECC” at the end of “Up to 96 KB on-chip SRAM”

Table 1 (MPC5607B family comparison), updated SCI (LINFlex) values, 8 channels for

both MPC5605B and MPC5606B 176-pin.

Table 12 (Recommended operating conditions (3.3 V)), updated conditions of TA values

and relative footnote.

Table 13 (Recommended operating conditions (5.0 V)), updated conditions of TA values

and relative footnote.

Table 20 (Output pin transition times), replaced Ttr with ttr

Table 24 (Reset electrical characteristics), replaced Ttr with ttr

Updated Section 4.16.2, “Input impedance and ADC accuracy

Table 26 (Low voltage detector electrical characteristics), changed VLVDHV3L(min) and

VLVDHV3BL(min) from 2.7 V to 2.6 V.

Table 28 (Program and erase specifications), added footnote about tESRT

Table 40 (FMPLL electrical characteristics), deleted footnote relative to maximum value

of fCPU

Table 44 (ADC_0 conversion characteristics (10-bit ADC_0)), changed IADC0run value

from 40 mA to 5 mA.

Table 47 (DSPI characteristics), in the heading row, replaced

DSPI0/DSPI1/DSPI5/DSPI6 with DSPI0/DSPI1/DSPI3/DSPI5

19 Mar 2014 Added “K=TSMC Fab” against the Fab and mask indicator in Figure 40 (Commercial

product code structure).

9 Nov 2017

In Table 12 (Recommended operating conditions (3.3 V)) added Min value for TVDD.

In Table 13 (Recommended operating conditions (5.0 V)) added Min value for TVDD.

In 6, Ordering information added note “Not all options are available on all devices“.

8 August

2021

In 6, Ordering information, updated Fab and Mask indicator.

Table 54. Revision history (continued)

Revision

Date

Substantive changes

PPC5605BAMLL4R Datasheet(PDF) 113 Page - NXP Semiconductors