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NVMJS3D0N06C Datasheet(PDF) 1 Page - ON Semiconductor |
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NVMJS3D0N06C Datasheet(HTML) 1 Page - ON Semiconductor |
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1 / 7 page ![]() DATA SHEET www.onsemi.com © Semiconductor Components Industries, LLC, 2021 October, 2021 − Rev. 0 1 Publication Order Number: NVMJS3D0N06C/D MOSFET - Power, Single N-Channel 60 V, 2.9 mW, 139.3 A NVMJS3D0N06C Features • Small Footprint (5x6 mm) for Compact Design • Low RDS(on) to Minimize Conduction Losses • Low QG and Capacitance to Minimize Driver Losses • AEC−Q101 Qualified and PPAP Capable • These Devices are Pb−Free and are RoHS Compliant MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 60 V Gate−to−Source Voltage VGS ±20 V Continuous Drain Current RqJC (Notes 1, 3) Steady State TC = 25°C ID 139.3 A TC = 100°C 98.5 Power Dissipation RqJC (Note 1) TC = 25°C PD 112.5 W TC = 100°C 56.2 Continuous Drain Current RqJA (Notes 1, 2, 3) Steady State TA = 25°C ID 26.9 A TA = 100°C 19 Power Dissipation RqJA (Notes 1, 2) TA = 25°C PD 4.2 W TA = 100°C 2.1 Pulsed Drain Current TA = 25°C, tp = 10 ms IDM 900 A Operating Junction and Storage Temperature Range TJ, Tstg −55 to +175 °C Source Current (Body Diode) IS 93.7 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 9.1 A) EAS 430 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction−to−Case − Steady State (Note 1) RqJC 1.33 °C/W Junction−to−Ambient − Steady State (Notes 1, 2) RqJA 35.9 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. V(BR)DSS RDS(ON) MAX ID MAX 60 V 2.9 mW @ 10 V 139.3 A G (4) S (1,2,3) N−CHANNEL MOSFET D (5) See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. ORDERING INFORMATION MARKING DIAGRAM LFPAK8 CASE 760AA 3D0N06 C AWLYW G S DD D D SS 1 3D0N06C = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year W = Work Week |
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