CC400-RTR2 datasheet(24/31 Pages) TI

24 / 31 page

CC400

SWRS050

Page 24 of 32

NAME

Default

value

Active

Description

B[12:11]

AB[1:0]

Antibacklash pulse width

00 = 0ns (nominal setting)

01 = 2.7ns

10 = 4.8ns

11 = 10.9ns

Tolerance (+200% / - 70%)

B[10:7]

A[3:0]

A-counter

B[6:0]

M[6:0]

M-counter

NAME

Default

value

Active

Description

C[12]

RESSYN

Synthesiser reset

0 = Normal operation

1 = Reset synthesiser

C[11:9]

V[3:1]

VCO gain programmering.

LSB-bit VO = “0”.

000= maximum gain

111=minimum gain

Reduce gain to reduce LO spurious emission

C[8]

PA[4]

PA gain programmering. Part of PA4:PA0

C[7]

FSIG

Charge pump polarity

0 = Add charge when VREF leads FVCO (Normal)

1 = Sink charge when VREF leads FVCO

C[6:5]

CHP[1:0]

Charge pump current:

00 = 10

µA

01 = 20

µA

10 = 40

µA (nominal setting)

11 = 80

µA

C[4]

PDX

Reference oscillator power down

0 = Power on even during main power down

1 = Power down (during main power down)

C[3:0]

R[3:0]

R-divider

NAME

Default

value

Active

Description

D[12:11]

PA[1:0]

PA gain programming. Part PA4

D[10:0]

K10:0]

K-counter

K10 er sign bit (0=positive, 1 negative).

Negative K must be 2’s complement

NAME

Default

value

Active

Description

E[12]

PLL Lock-Window tolerance

0 = 21ns (Normal setting)

1 = 44ns

E[11]

Lock mode

(Lock is reset when PLL is reprogrammed).

0 = Single shot

1 = Continuous

E[10]

Lock detection enable

0 = Lock detection enabled

1 = Lock detection disabled (LOCK=1)

CC400-RTR2 Datasheet(PDF) 24 Page - Texas Instruments

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