R5F56604CDFM datasheet(4/123 Pages) RENESAS

4 / 123 page

RX660 Group

1. Overview

R01DS0393EJ0100 Rev.1.00

Page 4 of 123

Mar 18, 2022

External bus extension

 The external address space can be divided into four areas (CS0 to CS3), each with

independent control of access settings.

Capacity of each area: 2 Mbytes (CS0 to CS3)

A chip-select signal (CS0# to CS3#) can be output for each area.

Each area is specifiable as an 8-, or 16-bit bus space.

The data arrangement in each area is selectable as little or big endian (only for data).

 Bus format: Separate bus, multiplex bus

 Wait control

 Write buffer facility

DMA

DMA controller

(DMACAa)

 8 channels

 Three transfer modes: Normal transfer, repeat transfer, and block transfer

 Activation sources: Software trigger, external interrupts, and interrupt requests from

peripheral functions

Data transfer controller

(DTCb)

 Three transfer modes: Normal transfer, repeat transfer, and block transfer

 Request sources: External interrupts and interrupt requests from peripheral functions

I/O ports

Programmable I/O ports

 I/O ports for the 144-pin LFQFP with no JTAG interface and no sub-clock oscillator

I/O pins: 133

Input pin: 1

Pull-up resistors: 133

Open-drain outputs: 133

5-V tolerance: 4

 I/O ports for the 144-pin LFQFP with a sub-clock oscillator, but no JTAG interface

I/O pins: 131

Input pin: 1

Pull-up resistors: 131

Open-drain outputs: 131

5-V tolerance: 4

 I/O ports for the 144-pin LFQFP with a JTAG interface, but no sub-clock oscillator

I/O pins: 132

Input pin: 1

Pull-up resistors: 132

Open-drain outputs: 132

5-V tolerance: 4

 I/O ports for the 144-pin LFQFP with a JTAG interface and a sub-clock oscillator

I/O pins: 130

Input pin: 1

Pull-up resistors: 130

Open-drain outputs: 130

5-V tolerance: 4

 I/O ports for the 100-pin LFQFP with no JTAG interface and no sub-clock oscillator

I/O pins: 91

Input pin: 1

Pull-up resistors: 91

Open-drain outputs: 91

5-V tolerance: 4

 I/O ports for the 100-pin LFQFP with a sub-clock oscillator, but no JTAG interface

I/O pins: 89

Input pin: 1

Pull-up resistors: 89

Open-drain outputs: 89

5-V tolerance: 4

 I/O ports for the 100-pin LFQFP with a JTAG interface, but no sub-clock oscillator

I/O pins: 90

Input pin: 1

Pull-up resistors: 90

Open-drain outputs: 90

5-V tolerance: 4

Table 1.1

Outline of Specifications (3/8)

Classification

Module/Function

Description

R5F56604CDFM Datasheet(PDF) 4 Page - Renesas Technology Corp

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