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SN74LVC2G07DBVR Datasheet(PDF) 8 Page - Texas Instruments |
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SN74LVC2G07DBVR Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 30 page ![]() LAUNCHXL-F28379D Hardware www.ti.com 8 SPRUI77C – August 2016 – Revised March 2019 Submit Documentation Feedback Copyright © 2016–2019, Texas Instruments Incorporated LAUNCHXL-F28379D Overview 6 LAUNCHXL-F28379D Hardware 6.1 Device Pin Out Table 5 through Table 8 lists the pin out and pin mux options for the C2000 LaunchPad. Additional muxing options are available and can be found in the TMS320F2837xD Dual-Core Delfino™ Microcontrollers Data Manual. (1) For full pin muxing table for functions shown here and additional mux options, see the TMS320F2837xD Dual-Core Delfino™ Microcontrollers Data Manual. (2) This signal is also routed to the IO expansion header, J9. For information on how to configure this signal, see Section 5.5. Table 5. F28379D LaunchPad Pin Out and Pin Mux Options - J1, J3 Mux Value J1 Pin J3 Pin Mux Value X 2 1 0 0 Alt Function 2 X 3.3V 1 21 5V GPIO32 2 22 GND SCIRXDB GPIO19 3 23 ADCIN14 CMPIN4P SCITXDB GPIO18 4 24 ADCINC3 CMPIN6N GPIO67 5 25 ADCINB3 CMPIN3N GPIO111 6 26 ADCINA3 CMPIN1N SPICLKA(1) GPIO60 7 27 ADCINC2 CMPIN6P GPIO22 8 28 ADCINB2 CMPIN3P SCLA GPIO105(2) 9 29 ADCINA2 CMPIN1P SDAA GPIO104(2) 10 30 ADCINA0 DACOUTA (1) For full pin muxing table for functions shown here and additional mux options, see the TMS320F2837xD Dual-Core Delfino™ Microcontrollers Data Manual. (2) This signal is also routed to the IO expansion header, J9. For information on how to configure this signal, see Section 5.5. Table 6. F28379D LaunchPad Pin Out and Pin Mux Options - J4, J2 Mux Value J4 Pin J2 Pin Mux Value X 2 1 0 0 1 2 X EPWM1A GPIO0 40 20 GND EPWM1B GPIO1 39 19 GPIO61 EPWM2A GPIO2 38 18 GPIO123 SD1_C1(1) EPWM2B GPIO3 37 17 GPIO122 SD1_D1(1) EPWM3A GPIO4 36 16 RST EPWM3B GPIO5 35 15 GPIO58 SPISIMOA(1) OUTPUTXBAR1 GPIO24 34 14 GPIO59 SPISOMIA(1) OUTPUTXBAR7(1) GPIO16 33 13 GPIO124 SD1_D2(1) DAC1 32 12 GPIO125 SD1_C2(1) DAC2 31 11 GPIO29(2) OUTPUTXBAR6(1) |
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