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SH79F6489P/080PR Datasheet(PDF) 115 Page - SINOWEALTH Electronic Ltd |
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SH79F6489P/080PR Datasheet(HTML) 115 Page - SINOWEALTH Electronic Ltd |
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115 / 152 page ![]() SH79F6488/SH79F6489 115 Table 8.34 USB Interrupt Vector Register 1 E8H (Bank1) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 USBIF1 PUPIF OVERIF OW SETUPIF SOFIF RESMIF SUSPIF USBRSTIF R/W R/W R/W R R/W R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 0 0 0 0 Bus Reset Value (USB RESET) U U U U U U U U USB Software Reset Value U 0 0 0 U 0 0 0 Bit No. Bit Mnemonic Description 7 PUPIF Plug/Unplug Interrupt Flag bit 0: No Plug/Unplug interrupt generating, cleared by software 1: Set by hardware to indicate the USB device plugged or unplugged in the host 6 OVERIF Setup Transaction Overwrite Interrupt Flag bit 0: No setup transaction overwrite interrupt flag generating, cleared by software. Befor this bit cleared by software, cleared SETUPIF bit first 1: Set by hardware to indicate setup transaction is received when output buffer of EP0 is not empty and data is written into the output buffer of EP0 and input/output data package is received again 5 OW Setup Transaction Overwrite State Flag bit 0: No setup transaction overwrite generating 1: Set by hardware to indicate setup transaction is received again when output buffer of EP0 is not empty (OEP0RDY=0, When setup transaction is received, regardlessly error or returned an ACK lastly) and data is written into the output buffer of EP0 USB software reset or cleared by software. OVERIF may clear this bit. 4 SETUPIF Setup Transaction Interrupt Flag bit 0: No setup transaction received 1: Setup transaction is received, returns an ACK, and asserts setup transaction interrupt When data is read out from the output buffer of EP0, this bit will be cleared 3 SOFIF Start-Of-Frame(SOF) Transaction Interrupt Flag bit 0: No SOF transaction received, cleared by software 1: SOF transaction received, and asserts SOF transaction interrupt 2 RESMIF Resume Command Interrupt Flag bit 0: No resume command received, cleared by software 1: Resume command received, and asserts resume command interrupt 1 SUSPIF Suspend Command Interrupt Flag bit 0: No suspend command received, cleared by software 1: Suspend command received, and asserts suspend command interrupt When suspend command is received, the device must be setted to suspend state by software in 7ms (Set GOSUSP bit in USBCON register), if the device obtain current from USB bus not more than suspend current (Refer to USB SPEC for details). 0 USBRSTIF Bus Reset Command Interrupt Flag bit 0: No bus reset command received, cleared by software 1: Bus reset command received, and asserts bus reset command interrupt |
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