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SH79F6489P/080PR Datasheet(PDF) 119 Page - SINOWEALTH Electronic Ltd

Part # SH79F6489P/080PR
Description  Enhanced 8051 Microcontroller with 20bit Σ-ΔADC and LCD Driver
PDF  152 Pages
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Manufacturer  SINOWEALTH [SINOWEALTH Electronic Ltd]
Direct Link  https://en.sinowealth.com
Logo SINOWEALTH - SINOWEALTH Electronic Ltd

SH79F6489P/080PR Datasheet(HTML) 119 Page - SINOWEALTH Electronic Ltd

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SH79F6488/SH79F6489
119
Table 8.39 Endpoint 0 Control Register
98H (Bank1)
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
EP0CON
IEP0DTG
OEP0DTG
-
-
IEP0STL
IEP0RDY
OEP0STL OEP0RDY
R/W
R/W
R/W
-
-
R/W
R/W
R/W
R/W
Reset Value
(POR/WDT/LVR/PIN)
0
0
-
-
0
0
0
0
Bus Reset Value
(USB RESET)
0
0
-
-
0
U
0
U
USB Software Reset
Value
0
0
-
-
0
0
0
0
Bit No.
Bit Mnemonic
Description
7
IEP0DTG
Endpoint 0 IN Data Toggle bit
0: Reading out ‘0’ indicates that the next data toggle bit is Data1, writing in ‘0’
indicates that the next data toggle bit will be setted as Data1
1: Reading out ‘1’ indicates that the next data toggle bit is Data0, writing in ‘1’
indicates that the next data toggle bit will be setted as Data0
6
OEP0DTG
Endpoint 0 OUT Data Toggle bit
0: Reading out ‘0’ indicates that the next data toggle bit is Data1, writing in ‘0’
indicates that the next data toggle bit will be setted as Data1
1: Reading out ‘1’ indicates that the next data toggle bit is Data0, writing in ‘1’
indicates that the next data toggle bit will be setted as Data0
3
IEP0STL
Endpoint 0 IN STALL Enable bit
0: Disable Endpoint 0 IN STALL
1: Enable Endpoint 0 IN STALL, When the host sends IN transaction to Endpoint
0, returns a STALL
When setup transaction is received, IEP0STL is auto-cleared
2
IEP0RDY
Endpoint 0 IN State bit
0: Endpoint 0 IN is not ready, When the host sends IN transaction to Endpoint 0,
returns a NAK
1: Endpoint 0 IN is ready
When the host sends IN transaction to Endpoint 0, if this bit is ‘1’, the USB
transceiver sends data in Endpoint 0 buffer, and after receiving an ACK from the
host, this bit is cleared, generate Endpoint 0 IN interrupt.
Writing the data (need to be sent to the host) into Endpoint 0 buffer again by
software, and setting this bit indicates the next IN transaction can be received.
Software write 0 has no effect.
1
OEP0STL
Endpoint 0 OUT STALL Enable bit
0: Disable Endpoint 0 OUT STALL
1: Enable Endpoint 0 OUT STALL, when the host sends OUT transaction to
Endpoint 0, returns a STALL
When setup transaction is received, OEP0STL is auto-cleared
0
OEP0RDY
Endpoint 0 OUT State bit
0: Endpoint 0 OUT is not ready, When the host sends OUT transaction to
Endpoint 0, returns a NAK
1: Endpoint 0 OUT is ready
When the host sends OUT transaction to Endpoint 0, if this bit is ‘1’, the USB
transceiver writes data into Endpoint 0 buffer, and after returning an ACK to the
host, this bit is cleared, generate Endpoint 0 OUT interrupt.
After reading out the data in Endpoint 0 buffer by software, setting this bit
indicates the next OUT transaction can be received. Software write 0 has no
effect.



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