TC3567CFSG datasheet(9/49 Pages) TOSHIBA

9 / 49 page

TC3567CFSG-002

2018-04-06

Pin name

Pin No.

Attribute

Condition

Functional description

VDD category

Direction

Type

Default

(during reset)

SWDCLK

VDDIO

Pull-up

Pull-down

Schmitt trigger

Pull-down

Serial Wire debugger clock pin.

During the reset, it remains in the input state with

connecting the Pull-down resistor. After the reset is

released, it will be the input of the Serial Wire

Debugger clock.

When not used, this pin should be open.

SWDIO

VDDIO

IN/OUT

Pull-up

Pull-down

Schmitt trigger

Pull-up

Serial Wire Debugger data pin and operation

switching pin.

During the reset, it remains in the input state with

connecting the Pull-up resistor. After the reset is

released, it will be the input and output of the Serial

Wire Debugger data.

When not used, this pin should be open.

IC test interface

TMODE

VDDIO

Schmitt trigger

—

Test mode setting pins.

This pin is used for IC manufacturing test and need

to be connected to GND when assembled on a

board.

TRTEST1

TRTEST2

VDD12A

IN/OUT

Analog

—

Analog test pins.

These pins are used for IC manufacturing test and

need to be connected to GND when assembled on

a board.

TC3567CFSG Datasheet(PDF) 9 Page - Toshiba Semiconductor

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