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STM32L010R8 Datasheet(PDF) 64 Page - STMicroelectronics

Part # STM32L010R8
Description  Value line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0,64-Kbyte Flash memory, 8-Kbyte SRAM, 256-byte EEPROM, ADC
PDF  92 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L010R8 Datasheet(HTML) 64 Page - STMicroelectronics

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Electrical characteristics
STM32L010K8 STM32L010R8
64/92
DS12325 Rev 3
6.3.10
EMC characteristics
Susceptibility tests are performed on a sample basis during device characterization.
Functional EMS (electromagnetic susceptibility)
While a simple application is executed on the device (toggling 2 LEDs through I/O ports).
the device is stressed by two electromagnetic events until a failure occurs. The failure is
indicated by the LEDs:
•
Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until
a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard.
•
FTB: A Burst of Fast Transient voltage (positive and negative) is applied to VDD and
VSS through a 100 pF capacitor, until a functional disturbance occurs. This test is
compliant with the IEC 61000-4-4 standard.
A device reset allows normal operations to be resumed.
The test results are given in Table 43. They are based on the EMS levels and classes
defined in application note AN1709.
Table 42. Flash memory and data EEPROM endurance and retention
Symbol
Parameter
Conditions
Value
Unit
Min(1)
1. Guaranteed by characterization results, not tested in production.
NCYC(2)
Cycling (erase / write)
Program memory
TA = –40°C to 85 °C
10
kcycles
Cycling (erase / write)
EEPROM data memory
100
tRET(2)
2. Characterization is done according to JEDEC JESD22-A117.
Data retention (program memory) after
10 kcycles at TA = 85 °C
TRET = +85 °C
30
years
Data retention (EEPROM data memory)
after 100 kcycles at TA = 85 °C
30
Table 43. EMS characteristics
Symbol
Parameter
Conditions
Level/
Class
VFESD
Voltage limits to be applied on any I/O pin to induce
a functional disturbance
VDD = 3.3 V, TA = +25 °C,
fHCLK = 32 MHz
conforms to IEC 61000-4-2
3B
VEFTB
Fast transient voltage burst limits to be applied
through 100 pF on VDD and VSS pins to induce a
functional disturbance
VDD = 3.3 V, TA = +25 °C,
fHCLK = 32 MHz
conforms to IEC 61000-4-4
4A



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