STM32W108HB datasheet(115/278 Pages) STMICROELECTRONICS

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

Serial interfaces

Doc ID 16252 Rev 14

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9.5.1

Setup and configuration

The I2C controller is enabled by writing 3 to the SCx_CR register. The I2C controller

operates only in master mode and supports both Standard (100 kbps) and Fast (400 kbps)

I2C modes. Address arbitration is not implemented, so multiple master applications are not

supported.

The I2C master controller's serial clock (SCL) is produced by a programmable clock

generator. SCL is produced by dividing down 12 MHz according to this equation:

Rate

12MHz

LIN

()x2EXP

-----------------------------------------

EXP is the value written to the SCx_CRR2 register and LIN is the value written to the

SCx_CRR1 register. I2C clock rate programming on page 115 shows the rate settings for

Standard-Mode I2C (100 kbps) and Fast-Mode I2C (400 kbps) operation.

Note:

At 400 kbps, the Philips I2C Bus specification requires the minimum low period of SCL to be

1.3 µs, but on the STM32W108 it is 1.25 µs. If a slave device requires strict compliance with

SCL timing, the clock rate must be lowered to 375 kbps.

9.5.2

Constructing frames

The I2C master controller supports generating various frame segments by means of the

START, STOP, BTE, and BRE bits in the SCx_I2CCR1 registers. Figure 27 summarizes

these frames.

Table 26.

I2C clock rate programming

Clock rate

SCx_CRR1

SCx_CRR2

100 kbps

375 kbps

400 kbps

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