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STM32W108HB Datasheet(PDF) 112 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 112 Page - STMicroelectronics |
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112 / 278 page  Serial interfaces STM32W108HB STM32W108CC STM32W108CB STM32W108CZ 112/278 Doc ID 16252 Rev 14 Same as above except LSB first instead of MSB first. 9.4.2 Operation When the slave select (nSSEL) signal is asserted by the master, SPI transmit data is driven to the output pin MISO, and SPI data is received from the input pin MOSI. The nSSEL pin has to be asserted to enable the transmit serializer to drive data to the output signal MISO. A falling edge on nSSEL resets the SPI slave shift registers. Characters transmitted and received by the SPI slave controller are buffered in the transmit and receive FIFOs that are both 4 entries deep. When software writes a character to the SCx_DR register, it is pushed onto the transmit FIFO. Similarly, when software reads from the SCx_DR register, the character returned is pulled from the receive FIFO. If the transmit and receive DMA channels are used, the DMA channels also write to and read from the transmit and receive FIFOs. Table 24. SPI slave mode formats SCx_SPICR Frame format MSTR LSB FIRST CPHA CPOL 000 0 000 1 001 0 001 1 01 - - TX[7] RX[7] TX[6] RX[6] TX[5] RX[5] TX[4] RX[4] TX[3] RX[3] TX[2] RX[2] TX[1] RX[1] TX[0] RX[0] nSSEL SCLKin MOSIin MISOout TX[7] RX[7] TX[6] RX[6] TX[5] RX[5] TX[4] RX[4] TX[3] RX[3] TX[2] RX[2] TX[1] RX[1] TX[0] RX[0] SCLKin MOSIin MISOout TX[7] RX[7] TX[6] RX[6] TX[5] RX[5] TX[4] RX[4] TX[3] RX[3] TX[2] RX[2] TX[1] RX[1] TX[0] RX[0] nSSEL SCLKin MOSIin MISOout TX[7] RX[7] TX[6] RX[6] TX[5] RX[5] TX[4] RX[4] TX[3] RX[3] TX[2] RX[2] TX[1] RX[1] TX[0] RX[0] nSSEL MOSIin MISOout SCLKin |
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