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STM32W108CB Datasheet(PDF) 58 Page - STMicroelectronics |
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STM32W108CB Datasheet(HTML) 58 Page - STMicroelectronics |
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58 / 278 page ![]() System modules STM32W108HB STM32W108CC STM32W108CB STM32W108CZ 58/278 Doc ID 16252 Rev 14 Clock switching (CLK) register map Table 9 gives the CLK register map and reset values. PERIOD[15:0] Refer to Figure 4: STM32W108xB memory mapping, Figure 5: STM32W108CC and STM32W108CZ memory mapping, and Table 3: STM32W108xx peripheral register boundary addresses for the register boundary addresses of the peripherals available in all STM32W108xx devices. Table 9. CLK register map and reset values Offset Register 0x0008 CLK_SLEEPCR Reset value 10 0x000C CLK_LSI10KCR TUNE[3:0] Reset value 00 00 0x0010 CLK_LSI1KCR CALINT[4:0] CLKFRAC[10:0] Reset value 01 010000 000000 00 0x0014- 0x4000 0x4004 CLK_HSECR1 BIASTRIM [3:0] Reset value 11 11 0x4008 CLK_HSICR TUNE[4:0] Reset value 011 11 0x400C CLK_HSECOMPR Reset value 00 0x4010 CLK_PERIODCR Reset value 00 0x4014 CLK_PERIODSR Reset value 00 000000 000000 00 0x4018 CLK_DITHERCR Reset value 0 0x401C CLK_HSECR2 Reset value 00 0x4020 CLK_CPUCR Reset value 0 |
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