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STM32W108CB Datasheet(PDF) 11 Page - STMicroelectronics |
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STM32W108CB Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 278 page ![]() STM32W108HB STM32W108CC STM32W108CB STM32W108CZ Description Doc ID 16252 Rev 14 11/278 Packet sniffer ADC RF_P,N Program Flash 128 kBytes 192 kBytes 256 kBytes Data SRAM 8 kBytes 12 kBytes 16 kBytes HF crystal OSC LF crystal OSC General Purpose ADC Serial Wire and JTAG debug Internal LF RC-OSC GPIO multiplexor swtich Chip manage r Regulator Bias 2 nd level Interrupt controller RF_TX_ALT_P,N PA[7:0], PB[7:0], PC[7:0] Encryption acclerator IF Always Powered Domain ARM CORTEX-M3® CPU with NVIC and MPU VREG_OUT Watchdog PA select LNA PA PA DAC MAC + Baseband Sleep timer BIAS_R POR nRESET General purpose timers GPIO registers UART/ SPI/I2C SYNTH Internal HF RC-OSC TX_ACTIVE SWCLK, JTCK Calibration ADC Packet Trace CPU debug TPIU/ITM/ FPB/DWT Ai15250 OSC_OUT OSC_IN 1.1 Development tools The STM32W108 implements both the ARM Serial Wire and JTAG debug interfaces. These interfaces provide real time, non-intrusive programming and debugging capabilities. Serial Wire and JTAG provide the same functionality, but are mutually exclusive. The Serial Wire interface uses two pins; the JTAG interface uses five. Serial Wire is preferred, since it uses fewer pins. The STM32W108 also integrates the standard ARM system debug components: Flash Patch and Breakpoint (FPB), Data Watchpoint and Trace (DWT), and Instrumentation Trace Macrocell (DWT). Figure 1. STM32W108 block diagram |
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