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IN100-Q1-R-RC1F Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers |
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IN100-Q1-R-RC1F Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers |
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7 / 49 page ![]() 6 / 47 www.inplay-tech.com N1EDOC-DS-IN100-EN-V1.3 List of Figures Figure 1:System block diagram..................................................................................... 9 Figure 2:NanoBeaconTM features overview ..................................................................10 Figure 3:Pin assignments.............................................................................................11 Figure 4:Advertising packet and advertising packet creation process overview ...........14 Figure 5 : Trigger modes ................................................................................................ 17 Figure 6 : Recommended UART speed detection sequence............................................21 Figure 7 : Pulse counting............................................................................................... 22 Figure 8 : PWM sequence.............................................................................................. 22 Figure 9 : Sensor ADC block diagram............................................................................. 23 Figure 10: Load switch pins........................................................................................... 25 Figure 11 : Power management generates 2 domains (AON & DOOPD) from VCC ............. 26 Figure 12 : 32kHz RC frequency vs. temperature............................................................ 28 Figure 13 : 32.768kHz crystal ......................................................................................... 28 Figure 14 : External 32.768kHz clock source .................................................................. 29 Figure 15 : XO clock source ........................................................................................... 30 Figure 16 : eFuse memory programming process ........................................................... 31 Figure 17 : RF sub-system interface .............................................................................. 32 Figure 18 : Power supply sequence................................................................................ 33 Figure 19 : IN100 QFN18 reference design .......................................................................37 Figure 20 : IN100 DFN8 reference design .......................................................................37 Figure 21 : Solder reflow profile......................................................................................41 Figure 22 : QFN18 POD IN100-Q1-R-RC1I/ IN100-Q1-R-RC1F............................................. 42 Figure 23 : QFN18 POD IN100-D1-R-YC1I/ IN100-D1-R-YC1F............................................. 43 Figure 24 : DFN8 POD IN100-D1-R-RC1I/ IN100-D1-R-RC1F ............................................. 44 Figure 25 : DFN8 POD IN100-D1-R-YC1I/ IN100-D1-R-YC1F .............................................. 45 Figure 26 : QFN18 marking ............................................................................................ 46 Figure 27 : DFN8 marking.............................................................................................. 46 |
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