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UPSD3422 Datasheet(PDF) 87 Page - STMicroelectronics |
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UPSD3422 Datasheet(HTML) 87 Page - STMicroelectronics |
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87 / 300 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) UPSD3422, UPSD3433, UPSD3434, UPSD3454 MCU bus interface 87/300 A[10:8] and the remaining pins can be configured for other functions such as generating chip selects to the external devices. Figure 19. Connecting external devices using ports A and B for address AD[15:0] Figure 20. Connecting external devices using port A and an external latch for address AD[15:0] 18.4 Programmable bus timing The length of the bus cycles are user programmable at run time. The number of MCU_CLK periods in a bus cycle can be specified in the SFR register named BUSCON (see Table 49 on page 88). By default, the BUSCON register is loaded with long bus cycle times (6 MCU_CLK periods) after a reset condition. It is important that the post-reset initialization firmware sets the bus cycle times appropriately to get the most performance, according to Table 51 on page 90. Keep in mind that the PSD module has a faster Turbo mode (default) and a slower but less power consuming Non-Turbo mode. The bus cycle times must be programmed in BUSCON to optimize for each mode as shown in Table 51. See Section 28.5: PSD module detailed operation on page 207 for more details. uPSD34xx PSD Module External 8-bit Device MCU Module AI10434 AD[7:0] D[7:0] A8-15 A0-7 Port A CS Port B AD[15:8] PSEN ALE RD or WR RD or WR uPSD34xx PSD Module External 8-bit Device L A T C H MCU Module AI10435 AD[7:0] D[7:0] A7-0 A8-15 CS Port B AD[15:8] PSEN ALE RD or WR RD or WR Obsolete Product(s) - Obsolete Product(s) |
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