L99DZ100G datasheet(78/197 Pages) STMICROELECTRONICS

78 / 197 page

Application information

L99DZ100G, L99DZ100GP

78/197

DS11546 Rev 5

H Bridge Gate Driver, EC

control, bridge drivers, heater

driver, all high-side drivers

(except OUT_HS & OUT15)

supplied by VS

On/ Off(2)

Off

Fail-safe low-side switches

On/ Off(9)

Short circuit protection for

fail-safe low-side switches (in

case LS is switched on)

OUT_HS & OUT15 (P-

channel HS) supplied by

VSREG

On/ Off(2)

On/ Off (2)

On/ Off(2)

Charge pump

Off

ADC (SPI read out and

VSREG early warning

interrupt)

Off

Thermal shutdown TSD2

Off

Thermal shutdown TSD1x for

OUT_HS and OUT15 (P-

channel HS)

On/ Off(2)

1. Supply the processor in low current mode.

2. According to SPI setting and DIR.

3. Unless disabled by SPI.

4. The bus state is internally stored when going to standby mode. A change of bus state will lead to a wake-up after exceeding

of internal filter time (if wake-up by LIN or CAN is not disabled by SPI). Selective Wake functionality if enabled by SPI

5. After power-on, the HS CAN transceiver is in CAN_TRX_SLEEP mode. It is activated by SPI command

(CAN_GO_TRX_RDY= 1)

6. ON, if cyclic sense is enabled or during wake-up request.

7. ON if SWEN=1 (CAN partial networking enabled) and ongoing CAN communication on the bus.

8. Cyclic activation = pulsed ON during cyclic sense.

9. ON in Fail-Safe mode; if standby mode is entered with active Fail-safe mode the output remains ON in standby mode.

Table 63. Status of different functions/features vs operating modes (continued)

Function

Comments

Operating modes

Active mode

V1-standby static

mode (cyclic sense)

Vbat-standby static

mode (cyclic sense)

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