UPD301A

DS00002838B-page 22

 2018-2019 Microchip Technology Inc.

4.5

Power Delivery MAC

The PD MAC implements certain features of the protocol layer and physical layer of the Universal Serial Bus Power

Delivery Specification. On one end the PD MAC interfaces to the software implementing the bulk of protocol and higher

level layers and on the other end it interfaces to a BMC encoder / decoder module.

In addition to the normal TX and RX functions, the PD MAC implements the test mode logic defined in the USB PD

specification (BIST).

The PD MAC supports the following features:

• Automatic TX Mode for packet framing and CRC32 insertion.

• Raw TX Mode for bit level packet control.

• Automatic GoodCRC response to received messages.

• Automatic BIST Error Count Message in BIST RX Mode.

• GoodCRCTimer implementation.

• Automatic retries with programmable retry count.

• Redundant receive packets automatically dropped in auto response mode.

• 74 byte TX queue.

• 128 byte RX queue.

• Programmable TX Bit-time. Allows for changing operating frequency.

• Programmable preamble length.

• BIST TX and RX logic.

• Programmable TX and RX queue modes - buffer mode and FIFO mode.

• CRC32 generator for TX.

• CRC32 calculator and comparator for RX.

4.5.1

PD MAC TRANSMITTER

The PD MAC transmitter is comprised of three major blocks:

• TX Queue:

The TX Queue is where software loads the message to be transmitted.

• TX Control:

The TX Control implements the necessary control logic. It is responsible for reading the data from the TX queue

and based on the data processing mode (automatic or raw), processing the data to make it suitable (nibbles with

control information) for use by the TX Comm. It is also responsible for generating packet framing and terminating

the packet in automatic mode, and generating messages for automatic response (GoodCRC and BIST Error

Count). TX Control also handles the selection of the SOP type that is to be transmitted.

• TX Comm:

The TX Comm is comprised of a TX CRC generator, a 4b5b encoder, serializer, preamble generator, and TX bit

timer. It takes the nibble data, computes and inserts the CRC, 5b encodes, and generates the baseband serial

data. Preamble insertion is also performed by this logic.

4.5.2

PD MAC RECEIVER

The PD MAC receiver is comprised of three major blocks:

• RX Queue:

The RX Queue is where software reads the received messages.

• RX Control:

The RX Control implements the necessary control logic. It is responsible for validating the received packet, updat-

ing the RX Queue status, and triggering automatic responses, if required.

• RX Comm:

The RX Comm is comprised of the Clock and Data Recovery (CDR), RX DES (de-serializer) (serial-to-parallel

converter, 4b5b decoder, and framing detector), RX CRC32 (CRC calculator, receive timer), and other logic to

detect valid packet reception.