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ST25R3912 Datasheet(PDF) 28 Page - STMicroelectronics |
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ST25R3912 Datasheet(HTML) 28 Page - STMicroelectronics |
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28 / 130 page ![]() Functional overview ST25R3912 28/130 DS11794 Rev 9 Figure 7. ST25R3912 power supply Figure 7 shows the building blocks of the ST25R3912 power supply system and the signals that control it. The power supply system contains three regulators, a power-down support block, a block generating analog reference voltage (AGD) and a block performing automatic power supply adjustment procedure. The three regulators are providing supply to analog blocks (VSP_A), logic (VSP_D) and transmitter (VSP_RF). The use of VSP_A and VSP_D regulators is mandatory at 5 V power supply to provide regulated voltage to analog and logic blocks that only use 3.3 V devices. The use of VSP_A and VSP_D regulators at 3 V supply and VSP_RF regulator at any supply voltage is recommended to improve system PSRR. Regulated voltage can be adjusted automatically to have maximum possible regulated voltage while still having good PSRR. All regulator pins also have corresponding negative supply pins that are externally connected to ground potential (VSS). The reason for separation is in decoupling of noise induced by voltage drops on the internal power supply lines. Figure 2 and Figure 3 show typical ST25R3912 application schematics with all regulators used. All regulator pins and AGD voltage are buffered with capacitors. Recommended blocking capacitor values are detailed in Table 4. Regulators have two basic operation modes depending on supply voltage, 3.3 V supply mode (max 3.6 V) and 5 V supply mode (max 5.5 V). The supply mode is set by writing bit sup3 V in the IO configuration register 2. Default setting is 5 V, hence this bit has to be set to one after power-up in case of 3.3 V supply. MS42462V1 Power-down support sup3V 50 Ω RV<3:0> VSP_RF REG EN BGR and AGC AUTOREG VSP_A 1 kΩ VSP_D AGD reg 2Bh reg 2Ah VSP_A REG VSP_D REG adjust VSP_RF VDD Table 4. Recommended blocking capacitor values Pins Recommended capacitors AGD - VSS 1 μF, in parallel with 10 nF VSP_A - VSN_A VSP_D - VSN_D 2.2 μF, in parallel with 10 nF 2.2 μF, in parallel with 10 nF VSP_RF - VSN_RF 2.2 μF, in parallel with 10 nF |
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