AT25SF161 datasheet(28/51 Pages) RENESAS

28 / 51 page

AT25SF161

DS-25SF161–

046I–02/2021

Notes:

1. Only bits 6 through 3, 1, and 0 of the Status Register can be modified when using the Write Status Register command

2. R/W = Readable and writable

R = Readable only.

Figure 10-2. Read Status Register Byte 2

Table 10-2. Status Register Format – Byte 2

Bit(1)

Name

Type(2)

Description

SUS

Suspend Status

Device is not suspended (default)

Device is suspended from erase

CMP

Complement Block Protection

R/W

See table on Block Protection

LB3

Lock Security Register 3

R/W

Security Register page-3 is not locked (default)

Security Register page-3 cannot be erased/programmed

LB2

Lock Security Register 2

R/W

Security Register page-2 is not locked (default)

Security Register page-2 cannot be erased/programmed

LB1

Lock Security Register 1

R/W

Security Register page-1 is not locked (default)

Security Register page-1 cannot be erased/programmed

RES

Reserved for future use

Quad Enable

R/W

HOLD and WP function normally (default)

HOLD and WP are I/O pins

SRP1

Status Register Protect bit-1

R/W

See table on Status Register Protection

SCK

MSB

0101

41011

8122122

1720

1516

131423242829

2530

MSB

DDDDDD

MSB

DDDDDD

D DD

D D D

BYTE 2

GH-

MPEDANCE

BYTE 2

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