DA16200 datasheet(6/154 Pages) RENESAS

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DA16200

Ultra Low Power Wi-Fi SoC

Datasheet

Revision 3.6

04-Jan-2023

CFR0011-120-00

6 of 153

9.11 PWM

9.11.1

Timing Diagram ................................................................................................... 76

9.12 Debug Interface................................................................................................................... 76

9.13 Bluetooth Coexistence ........................................................................................................ 78

9.13.1

Interface Configuration ........................................................................................ 78

9.13.2

Operation Scenario .............................................................................................. 78

9.13.3

Enhanced Features (Variant 001 only)................................................................ 79

10 Register Map ................................................................................................................................ 80

10.1 GPIO Register ..................................................................................................................... 80

10.2 UART Register .................................................................................................................... 96

10.3 I2S Register ...................................................................................................................... 101

10.4 SDeMMC Register ............................................................................................................ 104

10.5 SPI and I2C Register ........................................................................................................ 119

10.6 RTC Register .................................................................................................................... 123

10.7 External Interrupt Control Register ................................................................................... 132

11 Applications Schematic ............................................................................................................ 133

11.1 Typical Application: QFN, 3.3 V Flash .............................................................................. 133

11.2 Typical Application: QFN, 1.8 V Flash .............................................................................. 135

11.3 Typical Application: fcCSP,1.8 V Flash Normal Power Mode........................................... 137

11.4 Typical Application: fcCSP,1.8 V Flash Low Power Mode................................................ 139

12 Package Information ................................................................................................................. 141

12.1 Moisture Sensitivity Level (MSL)....................................................................................... 141

12.2 Top View: QFN and fcCSP ............................................................................................... 141

12.3 Dimension: 48-Pin QFN .................................................................................................... 142

12.4 Dimension: 72-Pin fcCSP.................................................................................................. 143

12.5 Land Pattern: 48-Pin QFN ................................................................................................ 144

12.6 Land Pattern: 72-Pin fcCSP .............................................................................................. 145

12.7 Soldering Information ........................................................................................................ 146

12.7.1

Recommended Condition for Reflow Soldering ................................................ 146

13 Ordering Information ................................................................................................................ 148

Revision History .............................................................................................................................. 149

Figures

Figure 1: System Diagram..................................................................................................................... 3

Figure 2: Hardware Block Diagram ..................................................................................................... 13

Figure 3: Software Block Diagram....................................................................................................... 13

Figure 4: DA16200 QFN48 Pinout Diagram (Top View) ..................................................................... 15

Figure 5: DA16200 fcCSP72 Pinout Diagram (Top View)................................................................... 16

Figure 6: Brown-Out and Black-Out Levels......................................................................................... 28

Figure 7: RTC Crystal Connections - QFN.......................................................................................... 29

Figure 8: RTC Crystal Connections

– fcCSP ...................................................................................... 29

Figure 9: Crystal Clock Connections - QFN ........................................................................................ 30

Figure 10: Crystal Clock Connections - fcCSP.................................................................................... 30

Figure 11: Power On Sequence .......................................................................................................... 31

Figure 12: Power Management Block Diagram................................................................................... 32

Figure 13: OTP Block Diagram ........................................................................................................... 35

Figure 14: Memory Map ...................................................................................................................... 37

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