DA16200 datasheet(8/154 Pages) RENESAS

8 / 154 page

DA16200

Ultra Low Power Wi-Fi SoC

Datasheet

Revision 3.6

04-Jan-2023

CFR0011-120-00

8 of 153

Figure 74: DA16200 72-Pin fcCSP Package Dimensions................................................................. 143

Figure 75: DA16200 48-Pin QFN Land Pattern................................................................................. 144

Figure 76: DA16200 72-Pin FcCSP Land Pattern............................................................................. 145

Figure 77: Typical PCB Mounting Process Flow ............................................................................... 146

Figure 78: Reflow Condition .............................................................................................................. 147

Tables

Table 1: Pin Description ...................................................................................................................... 17

Table 2: Pin Type Definition ................................................................................................................ 18

Table 3: DA16200 Pin Multiplexing ..................................................................................................... 19

Table 4: Absolute Maximum Ratings................................................................................................... 20

Table 5: Recommended Operating Conditions ................................................................................... 20

Table 6: DC Parameters for Normal GPIOs, 1.8 V IO......................................................................... 21

Table 7: DC Parameters for Normal GPIOs, 3.3 V IO......................................................................... 21

Table 8: DC Parameters for RTC Block, 3.3 V VBAT ......................................................................... 22

Table 9: DC Parameters for RTC Block, 2.1 V VBAT ......................................................................... 22

Table 10: DC Parameters for Digital Wake-Up, 3.3 V VBAT and 1.8/3.3 V IO ................................... 22

Table 11: DC Parameters for Digital Wake-Up, 2.1 V VBAT and 1.8 V IO ......................................... 22

Table 12: WLAN Receiver Characteristics

– QFN .............................................................................. 23

Table 13: WLAN Receiver Characteristics

– fcCSP............................................................................ 23

Table 14: WLAN Transmitter Characteristics

– QFN .......................................................................... 24

Table 15: WLAN Transmitter Characteristics

– fcCSP (Normal Power Mode) ................................... 24

Table 16: WLAN Transmitter Characteristics

– fcCSP (Low Power Mode) ........................................ 25

Table 17: Current Consumption in Active State

– QFN ...................................................................... 26

Table 18: Current Consumption in Active State

– fcCSP (Normal Power Mode) ............................... 26

Table 19: Current Consumption in Active State

– fcCSP (Low Power Mode) .................................... 26

Table 20: Current Consumption in Low Power Operation................................................................... 27

Table 21: QFN Package ...................................................................................................................... 27

Table 22: fcCSP Package ................................................................................................................... 27

Table 23: Brown-Out and Black-Out Voltage Levels........................................................................... 28

Table 24: RTC Crystal Requirements ................................................................................................. 29

Table 25: WLAN Crystal Clock Requirements .................................................................................... 30

Table 26: Power On Sequence Timing Requirements ........................................................................ 31

Table 27: OTP Map ............................................................................................................................. 36

Table 28: RTC Pin Description ............................................................................................................ 38

Table 29: Wake-up Sources ................................................................................................................ 38

Table 30: I/O Power Domain ............................................................................................................... 39

Table 31: DMA1 Served Peripherals ................................................................................................... 43

Table 32: HW Accelerated Crypto Algorithms in DA16200 ................................................................. 49

Table 33: QSPI Master Timing Parameters ........................................................................................ 51

Table 34: SPI Master Pin Configuration .............................................................................................. 52

Table 35: SPI Master Timing Parameters ........................................................................................... 52

Table 36: Control Field of the 8-byte Control Type ............................................................................. 54

Table 37: Control Field of the 4-byte Control Type ............................................................................. 54

Table 38: SPI Slave Pin Configuration ................................................................................................ 54

Table 39: SPI Slave Timing Parameters ............................................................................................. 55

Table 40: SDIO Slave Pin Configuration ............................................................................................. 56

Table 41: SDIO Slave Timing Parameters .......................................................................................... 57

Table 42: I2C Master Pin Configuration .............................................................................................. 58

Table 43: I2C Master Timing Parameters ........................................................................................... 58

Table 44: I2C Slave Pin Configuration ................................................................................................ 59

Table 45: I2C Slave Timing Parameters ............................................................................................. 60

Table 46: SD/eMMC Master Pin Configuration ................................................................................... 61

Table 47: SD/eMMC Master Timing Parameters ................................................................................ 62

Table 48: I2S Pin Configuration .......................................................................................................... 63

Table 49: I2S Clock Selection Guide................................................................................................... 64

DA16200 Datasheet(PDF) 8 Page - Renesas Technology Corp

DA16200 Datasheet(HTML) 8 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL