ISL8282MEVAL1Z datasheet(38/51 Pages) RENESAS

38 / 51 page

FN9365 Rev.1.00

Page 38 of 51

Feb 14, 2019

ISL8282M

4. Functional Description

4.8

PGOOD Monitor

The PGOOD pin indicates when the converter is capable of supplying regulated voltage. PGOOD is asserted low if

there is a fault condition of a rail’s (VDD, PVCC, 7VLDO, or VIN) UVLO, output Overcurrent (OCP), output

Overvoltage (OVP), output Undervoltage (UVP), or Over-Temperature (OTP). Note: the PGOOD pin is an

undefined impedance with insufficient VDD (typically <2.5V).

4.9

PFM Mode Operation

In PFM mode, programmable by the PROG2 pin, the switching frequency is dramatically reduced to minimize the

switching loss and significantly improve light-load efficiency. The ISL8282M can achieve seamless transition

between PFM mode and PWM mode as load changes. For high VOUT applications, the LGATE might not turn on

long enough to charge the boot capacitor in PFM mode with 0A load. Renesas recommends enabling the

ISL8282M’s ultrasonic PFM feature, programmable by the PROG3 pin, which maintains the LGATE switching

frequency above 20kHz and keeps the boot capacitor charged for immediate load apply events. Alternatively,

maintaining a minimum load can enhance the boot capacitor charge.

4.10

SMBus, PMBus, and I2C Operation

The ISL8282M features SMBus, PMBus, and I2C with 32 programmable addresses through the PROG2 pin. The

SMBus/PMBus includes an Alert# line (SALERT) and Packet Error Check (PEC) to ensure data is properly

transmitted. The telemetry update rate is typically 108µs. The supported SMBus/PMBus/I2C addresses are

summarized in Table 11 on page 38. The 7-bit format address does not include the last bit (write and read): 40-47h,

60-67h, and 70-7Fh.

SMBus/PMBus/I2C allows the user to program the registers, as shown in Table 12 on page 42, except for

SMBus/PMBus/I2C addresses, 5.5ms (typical, worst 6.6ms) after all rails (VDD, PVCC, 7VLDO, and VIN) are

above POR. Figures 47 and 48 on page 39 show the initialization timing diagram for the serial bus with different

EN (Enable) pin states.

For proper operation, follow the SMBus, PMBus, and I2C protocol shown in Figure 49 on page 41. Note: the STOP

(P) bit is NOT allowed before the repeated START condition when reading the contents of a register.

When the device’s serial bus is not used, ground the device’s SCL, SDA, and SALERT pins and do not connect

them to the bus.

Table 11. SMBus/PMBus/I2C 7-Bit Format Address (Hex)

7-Bit Address

ISL8282MEVAL1Z Datasheet(PDF) 38 Page - Renesas Technology Corp