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MF0AES2001DUD Datasheet(PDF) 13 Page - NXP Semiconductors

Part # MF0AES2001DUD
Description  MIFARE Ultralight AES contactless limited-use IC
PDF  72 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MF0AES2001DUD Datasheet(HTML) 13 Page - NXP Semiconductors

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NXP Semiconductors
MF0AES(H)20
MIFARE Ultralight AES contactless limited-use IC
SELECT
cascade level 2
AES_AUTH
[UIDRetrKey]
AES_AUTH
[DataProtKey]
SELECT
cascade level 1
WUPA
REQA
WUPA
READY 1
READY 2
ACTIVE
AUTHENTICATED
IDLE
HALT
POR
ANTICOLLISION
READ
from page 0
READ
from page 0
HLTA
HLTA
memory
operations
identification
and
selection
procedure
aaa-043539
*READ (16 Byte)
FAST_READ
WRITE,
INC_CNT
READ_CNT
GET_VERSION
READ_SIG
WRITE_SIG
LOCK_SIG
VCSL
*
ANTICOLLISION
*
*
TRACEABLE
AES_AUTH
[DataProtKey]
AES_AUTH
[UIDRetrKey]
Remark: In all states, the command interpreter returns to the idle state on receipt of an unexpected command. If the IC
was previously in the HALT state, it returns in that state.
Remark: The VCSL command is only allowed in the ACTIVE state.
Remark: In ACTIVE state, all operations are allowed which are not requiring authentication.
Remark: In TRACEABLE state, once standard 7 byte UID is activated, there is not difference to ACTIVE state except that
VCSL command is not supported in TRACEABLE state. Once RID is activated, then on top of all operations allowed in
ACTIVE state in TRACEABLE state also all privacy sensitive operations reading UID bytes and originality signature are
allowed.
Remark: In AUTHENTICATED state, all operations are allowed like in ACTIVE or TRACEABLE state except VCSL
command. On top in AUTHENTICATED state, the access to protected memory element is allowed and access to counter
#2 is allowed if configured as authentication protected.
Figure 4. State diagram
8.4.1 IDLE and HALT
After Power-On-Reset (POR), MIFARE Ultralight AES switches to IDLE state. It only exits this state when a
REQA or a WUPA command is received from the contactless reader. Any other data received while in this state
is interpreted as an error and MIFARE Ultralight AES remains in the IDLE state. After a correctly executed HLTA
MF0AES_H_20
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 3.2 — 28 March 2023
13 / 72



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