MB91302ASLASHV301A datasheet(29/135 Pages) FUJI

29 / 135 page

MB91301 Series

■ BLOCK DIAGRAM

• MB91302A, MB91V301A

DMAC

5 channels

SDRAM I/F

3 channels

UART

3 channels

U-TIMER

2 channels

I2C I/F

4 channels

A/D converter

4 channels

Input Capture

X0, X1

MD0 to MD2

INIT

INT0 to INT7

NMI

SIN0 to SIN2

SOT0 to SOT2

SCK0 to SCK2

AN0 to AN3

ATG

AVRH, AVCC

AVSS/AVRL

TIN0 to TIN2

DREQ0, DREQ1

DACK0, DACK1

DEOP0, DEOP1

IOWR

IORD

A23 to A00

D31 to D16

D15 to D00

RD, WR

WR0 to WR3

CS0 to CS7

RDY

BRQ

BGRNT

SYSCLK

MCLK

MCLKE

SRAS

SCAS

SWE

DQMUU, L

DQMLU,L

LBA

BAA

PORT

FRCK

ICU0 to ICU3

PPG0 to PPG3

TRG0 to TRG3

SDA0, SDA1

SCL0, SCL1

Adapter

Bit search module

MB91302A : RAM 4 KB

MB91V301A : RAM 8 KB (stack)

Clock

control

Interrupt

controller

8 channels

External interrupts

4 channels

PPG timer

3 channels

Reload timer

External memory

I/F

PORT I/F

Bus

Converter

FR CPU

Core

Instruction Cache

4 KB

Free Run Timer

* : ROM has non-ROM model, the optimal real time OS internal model, and the IPL (Internal Program

Loader) internal model by adding the user ROM model.

MB91302A : ROM 4 KB*

MB91V301A : RAM 8 KB

MB91302A/V301A Datasheet(PDF) 29 Page - Fuji Electric

MB91302A/V301A Datasheet(HTML) 29 Page - Fuji Electric

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