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THS8083CPZP Datasheet(PDF) 49 Page - Texas Instruments

Part # THS8083CPZP
Description  Triple 8-Bit, 80 MSPS, 3.3-V Video and Graphics Digitizer With Digital PLL
PDF  61 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

THS8083CPZP Datasheet(HTML) 49 Page - Texas Instruments

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5–5
NOTE 11: Analog input bandwidth – The analog input bandwidth is defined as the maximum frequency of the input sine that can be applied to the
device for which a 3 dB attenuation is observed in the reconstructed signal.
5.4.5.3 Clamp
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PARAMETER
ADC_INTREF
MIN
TYP
MAX
UNIT
Clamp code adjustment range
See Note 12
100
138
LSB
Clamp code adjustment range
See Note 12
100
138
LSB
Clamp acquisition time at input dc level change
Input level changed by
Within 10% of final value
1
1.8
ms
Clamp acquisition time at input dc level change
In ut level changed by
100 mV
Within 1 LSB of final value
2.1
3.6
ms
Clamp acquisition time, clamp code change
Clamp changed from
min to max
Within 1 LSB
400
700
ns
Clamp droop error
Droop between 2 clamps at 15 kHz line rate
035
12
LSB
Clamp droop error
Droop between 2 clamps at 15 kHz line rate
0.35
1.2
LSB
NOTE 12: Clamp code adjustment range – A dc-input signal is applied to the device. The clamp code is changed from the minimum to maximum
setting. The corresponding change in the ADC output code is defined as the clamp code adjustment range.
5.4.6
Coarse PGA
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Full-scale adjustment range
0.4
1.2
V
Accuracy
± 6
LSB
Full-scale gain change settling time
285
ns
5.4.7
Fine PGA
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Full-scale adjustment range
–4
8
LSB



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