PC2119RUSLASH2 datasheet(22/60 Pages) PHILIPS

22 / 60 page

28. August 2000

Philips Semiconductors

Product speciﬁcation

LCD controllers/drivers

PCF2119x-2

Table 7

Explanations of symbols used in Table 6

Table 8

Explanation of TC1 and TC2 used in Table 6

Table 9

Explanation of S1 and S0 used in Table 6

BIT

STATE

LOGIC 0

LOGIC 1

I/D

decrement

increment

display freeze

display shift

display off

display on

cursor off

cursor on

cursor character blink off: character at cursor

position does not blink

cursor character blink on: character at cursor

position blinks

S/C

cursor move

display shift

R/L

left shift

right shift

4 bits

8 bits

use basic instruction set

use extended instruction set

L (no impact, if

M = 1 or SL = 1)

left/right screen: standard connection (as in

PCF2114)

left/right screen: mirrored connection (as in

PCF2116)

1st 16 characters of 32: columns are from 1 to 80

2nd 16 characters of 32: columns are from 1 to 80

2nd 16 characters of 32: columns are from 80 to 1

column data: left to right (as in PCF2116); column

data is displayed from 1 to 80

column data: right to left; column data is displayed

from 80 to 1

row data: top to bottom (as in PCF2116); row data is

displayed from 1 to 16 and icon row data is in

17 and 18

row data: bottom to top; row data is displayed from

16 to 1 and icon row data is in 18 and 17

character mode; full display

icon mode; only icons displayed

icon blink disabled

icon blink enabled

direct mode disabled

direct mode enabled

set VA

set VB

M (no impact, if

SL = 1)

1-line by 32 display

2-line by 16 display

MUX 1 : 18 (1

× 32 or 2 × 16 character display)

MUX 1 : 9 (1

× 16 character display)

last control byte; see Table 5

another control byte follows after data/command

TC1

TC2

DESCRIPTION

VLCD temperature coefﬁcient 0

VLCD temperature coefﬁcient 1

VLCD temperature coefﬁcient 2

VLCD temperature coefﬁcient 3; for ranges for TC see Chapter 13

DESCRIPTION

set internal HVgen stages to 1 (2 * voltage multiplier)

set internal HVgen stages to 2 (3 * voltage multiplier)

set internal HVgen stages to 3 (4 * voltage multiplier)

do not use

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