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TPA3107D2PAPR Datasheet(PDF) 7 Page - Texas Instruments |
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TPA3107D2PAPR Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 29 page  www.ti.com Biases and Reference s Startup Protection Logic VREGok RINP RINN Ramp Generator ROSC VCCok 4VReg AVCC VREG PWM Logic Gain Control Gain Control LINP LINN VBYP VBYP PWM Logic SYNC AVCC AVCC AVCC Gain Control GAIN0 GAIN1 8 ToGain Adj. Blocksand StartupLogic MUTE FAULT VREG AGND VBYP VREG VBYP VClamp Gen PVCCR Gate Drive Gate Drive VClamp Gen Gate Drive Thermal SC Detect PVCCR Gate Drive BSLN VCLAMPL PVCCL PVCCL BSLP LOUTN BSRN VCLAMPR PVCCR PVCCR ROUTN BSRP ROUTP PGNDR PVCCL PVCCL PGNDL LOUTP Gain Control Gain Gain Control Gain TLL Input Buffer (VCCCompliant) TLL Input Buffer (VCCCompliant) MSTR/SLV SHUTDOWN VBYP TPA3107D2 SLOS509A – OCTOBER 2006 – REVISED NOVEMBER 2006 FUNCTIONAL BLOCK DIAGRAM 7 Submit Documentation Feedback |
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