ADL5315ACPZ-R7 datasheet(14/20 Pages) AD

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ADL5315

Rev. 0 | Page 14 of 20

10m

100

2.2

100p

IINPT (A)

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

10n

100n

Figure 28. VSET Voltage vs. IINPT when

RLIM Is Configured for Automatic Photodiode Biasing

2.2

IINPT (mA)

1.4

1.6

1.8

2.0

1.2

0.2

0.4

0.6

0.8

1.0

Figure 29. VSET Voltage vs. IINPT when

RLIM Is Configured for Automatic Photodiode Biasing

Figure 28 and Figure 29 show the performance of the circuit in

Figure 27. The reverse bias across the photodiode is held at a

low value for small input currents to minimize dark current.

The VSET voltage increases in a linear manner at the higher input

currents to maintain accurate photodiode responsivity. The

minimum bias level for the configuration above is ~200 mV.

CHARACTERIZATION METHODS

During characterization, the ADL5315 was treated as a

precision 1:1 current mirror. To make accurate measurements

throughout the six-decade current range, calibrated Keithley

236 current sources were used to create and measure the test

currents. Measurements at low currents are very susceptible to

leakage to the ground plane. To minimize leakage on the

characterization board, the VSET pin is connected to traces that

buffer VINPT from ground. These traces are connected to the

triax guard connector to provide buffering along the cabling.

The primary characterization setup shown in Figure 30 is used

to perform all static measurements, including mirror linearity

between IINPT and IOUT, VINPT variation vs. IINPT, supply current, and

IINPT current limiting. Component selection of the characterization

board is similar to that of the evaluation board, except that triax

connectors are used instead of SMA. To measure pulse response,

noise, and small signal bandwidth, more specialized test setups

are used.

KEITHLEY 236

ADL5315

CHARACTERIZATION BOARD

VPOS VSET SREF COMM

IOUT

DC SUPPLIES/DMM

INPT

Figure 30. Primary Characterization Setup

The setup in Figure 31 is used to measure the output current

noise of the ADL5315. Batteries are used in numerous places to

minimize introduced noise and remove the uncertainty

resulting from the use of multiple dc supplies. In application,

properly bypassed dc supplies provide similar results. The load

resistor is chosen for each current to maximize signal-to-noise

ratio while maintaining measurement system bandwidth (when

combined with the low capacitance JFET buffer). The custom

LNA is used to overcome noise floor limitations in the

HP89410A signal analyzer.

ADL5315ACPZ-R7 Datasheet(PDF) 14 Page - Analog Devices

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