ADMV8513ACCZ-R7 datasheet(11/31 Pages) AD

11 / 31 page

Data Sheet

ADMV8513

THEORY OF OPERATION

analog.com

Rev. 0 | 11 of 31

MODE SELECTION

The ADMV8513 has two modes of operation: SPI write and SPI

fast latch. SPI write mode is the normal operating mode, whereas

SPI fast latch mode is used to sequence through the on-chip

lookup table (LUT) using the internal state machine. To select SPI

write mode, set the SFL pin low. For operation in SPI fast latch

mode, program the on-chip LUT and fast latch parameters with the

SFL pin low, and then bring the SFL pin high to enter this mode.

Figure 20 shows a simplified representation of the SPI with the

Figure 20. Simplified SPI Diagram

SPI WRITE MODE

SPI write mode has a write grouping (WR) in Register 0x020

through Register 0x022. The grouping consists of the following:

►

fCENTER load value

►

Bandwidth load value

►

Match load value

See the Register Details section for more information regarding the

write grouping.

SPI STREAMING

In general, there are two types of SPI streaming transactions, Endi-

an register ascending order and descending order. The ADMV8513

supports only the ascending order. To enable SPI streaming with

Endian register ascending order, program Register 0x000 to value

0x3C.

For SPI streaming to the write grouping, Register 0x020 to Register

0x022 (recommended), the transaction points to Register 0x020

and streams out 3 bytes of data. The transaction is 40 bits in total

(R/W bit + 15 bits address + 24 bits data).

For SPI streaming to the LUT, Register 0x100 to Register 0x15F

(recommended), the transaction points to Register 0x100 and

streams out 96 bytes of data. The transaction is 784 bits in total

(R/W bit + 15 bits address + 768 bits data).

INTERPOLATION FUNCTIONS

The ADMV8513 has three interpolation functions that allow the

user to specify the fCENTER of the filter only using the fCENTER load

value, and then the appropriate capacitor codes are determined

automatically. To enable these functions, set the INTERPOLATE bit

(Register 0x050) high. Figure 21 shows a simplified diagram of the

interpolation functions.

Figure 21. Interpolation Diagram

When the interpolation functions are enabled, the fCENTER load

range is 0 to 255, where 0 corresponds to the lowest frequency, and

255 corresponds to the highest frequency. For example, a value

of 0 corresponds to approximately 520 MHz, and a value of 255

corresponds to approximately 1300 MHz. The fCENTER load value

is used to determine the appropriate capacitor codes based on the

on-chip interpolation coefficients.

By default, the recommended interpolation coefficients are set for

nominal bandwidth. The interpolation coefficients can be adjusted

between ± 2% of nominal bandwidth with reasonable insertion

loss. Narrower bandwidth down to approximately 5% can also be

achieved at the expense of insertion loss.

ADMV8513ACCZ-R7 Datasheet(PDF) 11 Page - Analog Devices

ADMV8513ACCZ-R7 Datasheet(HTML) 11 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Datasheet Download

Link URL