LXT9785 datasheet(45/226 Pages) INTEL

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LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers

Datasheet

Document Number: 249241

Revision Number: 007

Revision Date: August 28, 2003

Table 14. Intel® LXT9785/LXT9785E LED Signal Descriptions – PQFP (Sheet 1 of 2)

Pin/Ball

Designation

Symbol

Type1

Signal Description2,3

PQFP

PBGA

K3,

K2,

LED0_1

LED0_2

LED0_3

OD, TS, SL,

Port 0 LED Drivers 1-3.

These pins drive LED indicators for Port 0. Each LED

can display one of several available status conditions

as selected by the LED Configuration Register (refer

to Table 96, “LED Configuration Register (Address

20, Hex 14)” on page 213 for details).

J4,

J3,

LED1_1

LED1_2

LED1_3

OD, TS, SL,

Port 1 LED Drivers 1-3.

These pins drive LED indicators for Port 1. Each LED

can display one of several available status conditions

as selected by the LED Configuration Register (refer

to Table 96, “LED Configuration Register (Address

20, Hex 14)” on page 213 for details).

H2,

H3,

LED2_1

LED2_2

LED2_3

OD, TS, SL,

Port 2 LED Drivers 1-3.

These pins drive LED indicators for Port 2. Each LED

can display one of several available status conditions

as selected by the LED Configuration Register (refer

to Table 96, “LED Configuration Register (Address

20, Hex 14)” on page 213 for details).

F2,

G3,

LED3_1

LED3_2

LED3_3

OD, TS, SL,

Port 3 LED Drivers 1-3.

These pins drive LED indicators for Port 3. Each LED

can display one of several available status conditions

as selected by the LED Configuration Register (refer

to Table 96, “LED Configuration Register (Address

20, Hex 14)” on page 213 for details).

180

181

182

K16,

K17,

J17

LED4_1

LED4_2

LED4_3

OD, TS, SL,

Port 4 LED Drivers 1-3.

These pins drive LED indicators for Port 4. Each LED

can display one of several available status conditions

as selected by the LED Configuration Register (refer

to Table 96, “LED Configuration Register (Address

20, Hex 14)” on page 213 for details).

1. Type Column Coding: I = Input, O = Output, OD = Open Drain output, ST = Schmitt Triggered input, TS =

Three-State-able output, SL = Slew-rate Limited output, IP = weak Internal Pull-up, ID = weak Internal pull-

Down.

2. The IP/ID resistors are disabled during H/W Power-Down mode. If a pin is an output or an I/O, the IP/ID

resistors are also disabled when the output is enabled.

3. The LED outputs are three-stated in H/W Power-Down mode and during H/W reset.

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