CS5535 datasheet(396/555 Pages) NSC

396 / 555 page

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396

Revision 0.8

UART/IR Controller Register Descriptions (Continued)

5.12.10.3 CEIR Configuration Register (RCCFG)

RCCFG controls the basic operation of the CEIR mode.

01101

40 kHz

Reserved

01110

41 kHz

Reserved

01111

42 kHz

Reserved

10000

43 kHz

Reserved

10001

44 kHz

Reserved

10010

45 kHz

Reserved

10011

46 kHz

Reserved

10100

47 kHz

Reserved

10101

48 kHz

Reserved

10110

49 kHz

Reserved

10111

50 kHz

Reserved

11000

51 kHz

Reserved

11001

52 kHz

Reserved

11010

53 kHz

Reserved

11011

54 kHz

Reserved

11100

55 kHz

Reserved

11101

56 kHz

Reserved

11110

56.9 kHz

Reserved

11111

Reserved

I/O Offset

02h

Type

R/W

Reset Value

00h

RCCFG Register Map

R_LEN

T_OV

RXHSC

RCDM_DS

RSVD

TXHSC

RC_MMD[1:0]

RCCFG Bit Descriptions

Bit

Name

Description

7R_LEN

Run Length Control. When set to 1, this bit enables run length encoding/decoding. The

format of a run length code is:

Yxxxxxxx, where Y is the bit value and xxxxxxx is the number of bits minus 1 (selects

from 1 to 128 bits).

6T_OV

Receiver Sampling Mode.

0: Programmed T period sampling.

1: Oversampling mode.

RXHSC

Receiver Carrier Frequency Select. This bit selects the receiver demodulator fre-

quency range.

0: Low frequency: 30.0-56.9 kHz.

1: High frequency: 400-480 kHz.

Table 5-50. CEIR Carrier Frequency Encoding (Continued)

MCFR[4:0]

Low Frequency (TXHSC = 0)

High Frequency (TXHSC = 1)

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