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UPD3753 Datasheet(PDF) 7 Page - Renesas Technology Corp |
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UPD3753 Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 22 page ![]() Data Sheet S16546EJ2V0DS 5 µ PD3753 ELECTRICAL CHARACTERISTICS TA = +25°C, VOD = 5 V, fφ 1 = 1 MHz, data rate = 1 MHz, storage time = 10 ms, input signal clock = 5 Vp-p, light source : 3200 K halogen lamp + C500 (infrared cut filter) Parameter Symbol Test Conditions Min. Typ. Max. Unit Saturation voltage Vsat 1.0 1.2 − V Saturation exposure SE Daylight color fluorescent lamp − 0.013 − lx•s Photo response non-uniformity PRNU VOUT = 500 mV − ±2 ±8 % Average dark signal ADS Light shielding − 1.0 8.0 mV Dark signal non-uniformity DSNU Light shielding −8 ±4 +8 mV Power consumption PW − 30 50 mW Output impedance ZO − 0.5 1 k Ω Response RF Daylight color fluorescent lamp 63 90 117 V/lx•s Response peak − 550 − nm Image lag IL VOUT = 1.0 V − 7 14 % Offset level Note VOS 2.5 3.0 3.5 V Output fall delay time Note td VOUT = 500 mV, t1, t2 = 50 ns − 130 − ns Total transfer efficiency TTE VOUT = 1.0 V, data rate = 2 MHz 92 98 − % Dynamic range DR Vsat/DSNU − 375 − times Reset feed-through noise Note RFTN Light shielding 0 800 1500 mV Bit noise BN Light shielding − 10 − mVp-p Resolution MTF Modulation transfer function at − 65 − % nyquist frequency Note Refer to TIMING CHART 2. Remark When VOD = 4.7 V, the response typically decreases to 90% of the value under 5 V operation. INPUT PIN CAPACITANCE (TA = +25°C, VOD = 5 V) Parameter Symbol Pin name Pin No. Min. Typ. Max. Unit Shift register clock pin capacitance 1 Cφ 1 φ 1 14 − 300 − pF Shift register clock pin capacitance 2 Cφ 2 φ 2 15 − 300 − pF Transfer gate clock pin capacitance Cφ TG φ TG 9 − 100 − pF |
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