UPD63335GA-9EU datasheet(38/58 Pages) RENESAS

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Data Sheet S15003EJ6V0DS

µPD63335

2.1.13 DAC volume registers (10h, 11h)

Read

Address

Write

Address

Default

90h

10h

SICK

DALM

DALV4

DALV3

DALV2

DALV1

DALV0

68h

91h

11h

SICK

DARM

DARV4

DARV3

DARV2

DARV1

DARV0

68h

These registers are used to set the DAC output signal’s mixer input volume. The correspondence between bits

and gain settings is shown below. Gain can be set in a range from +12.0 dB to –34.5 dB, in 1.5 dB steps. The

default value is 68h (gain: 0 dB, mute: ON).

• DALM:

DAC L channel mixer input mute control bit

• DARM:

DAC R channel mixer input mute control bit

• DALV[4:0]: DAC L channel mixer input gain control bits

• DARV[4:0]: DAC R channel mixer input gain control bits

Table 2-14. Correspondence of Bits and Gain Settings in DAC Volume Registers (10h, 11h)

DALM/DARM

DALV[4:0]/DARV[4:0]

Gain

0 0000

+12.0 dB

0 0001

+10.5 dB

••

•

••

•

••

•

0 1000

0 dB

••

•

••

•

••

•

1 1110

−33.0 dB

1 1111

−34.5 dB

x xxxx

Mute

0 1000

Default

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